This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: ix86 double alignment (was Re: egcs-1.1 release schedule)
- To: law at cygnus dot com
- Subject: Re: ix86 double alignment (was Re: egcs-1.1 release schedule)
- From: john at feith dot com (John Wehle)
- Date: Wed, 24 Jun 1998 17:43:11 -0400
- cc: burley at gnu dot org, d dot love at dl dot ac dot uk, egcs at cygnus dot com, davem at dm dot cobaltmicro dot com
> It's an interesting question to think about. HP recommends a 64byte
> alignment for the stack on PAs. It has some *really* nice benefits
> as far as the dcache is concerned. And until about a year ago we
> actually followed that guideline -- by setting STACK_BOUNDARY appropriately :-)
>
> That's how I know about the problems that combine will cause if you
> end up with a mis-aligned stack pointer relative to STACK_BOUNDARY.
> It turned out the crt0 code on hpux10 only provided 8 byte alignment
> for the stack pointer. Opps.
What about defining PREFERRED_STACK_BOUNDARY to mean the optimal stack
alignment and having it default to STACK_BOUNDARY? Then change the
places which align the stack based on STACK_BOUNDARY to use
PREFERRED_STACK_BOUNDARY. Leave code which implements optimizations
(and records the stack alignment) based on STACK_BOUNDARY alone. This
way gcc will attempt to align the stack based on PREFERRED_STACK_BOUNDARY
and assume STACK_BOUNDARY when implementing optimizations which should
be safe (assuming that PREFERRED_STACK_BOUNDARY >= STACK_BOUNDARY is
enforced).
I known ... I've probably oversimplified the issue. :-)
-- John
-------------------------------------------------------------------------
| Feith Systems | Voice: 1-215-646-8000 | Email: john@feith.com |
| John Wehle | Fax: 1-215-540-5495 | |
-------------------------------------------------------------------------