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Re: A patch for g77.f-torture/compile/980424-0.f
- To: law at cygnus dot com
- Subject: Re: A patch for g77.f-torture/compile/980424-0.f
- From: hjl at lucon dot org (H.J. Lu)
- Date: Mon, 1 Jun 1998 07:16:24 -0700 (PDT)
- Cc: burley at gnu dot org, egcs at cygnus dot com
> > H.J. Lu (hjl@gnu.org)
> > ----
> > Thu May 28 07:44:34 1998 H.J. Lu (hjl@gnu.org)
> >
> > * reload.c (find_reloads_toplev): Return constant in the proper
> > mode for SUBREG.
> I don't think this is correct.
>
> Basically you're special casing 3 constants -- what if the constant
> isn't one of those three constants, you lose.
>
Here is my new patch. Basically, only constant 0 may have the same
bit representation for INT, FLOAT and COMPLEX. Anything else is a bug.
But it is incorrect on machine where constant 0 has different bit
representation for INT, FLOAT and COMPLEX. But gcc should know which
machine does that. We can add
#ifdef CONSTANT_0_ALL_BITS_0
{
if (GET_MODE_CLASS (GET_MODE (SUBREG_REG (x)))
!= GET_MODE_CLASS (GET_MODE (x)))
{
if (rtx_equal_p (tem, CONST0_RTX (GET_MODE (SUBREG_REG (x)))))
return CONST0_RTX (GET_MODE (x));
else
/* At most, we can have INT and FLOAT have the same
bit representation for constant 0. Anything else
probably is a bug. */
abort ();
}
return tem;
}
#else
abort ();
#endif
--
H.J. Lu (hjl@gnu.org)
----
Index: reload.c
===================================================================
RCS file: /home/work/cvs/gnu/egcs/gcc/reload.c,v
retrieving revision 1.1.1.22
diff -u -p -r1.1.1.22 reload.c
--- reload.c 1998/05/30 01:37:58 1.1.1.22
+++ reload.c 1998/05/30 02:03:20
@@ -4281,7 +4281,20 @@ find_reloads_toplev (x, opnum, type, ind
&& (tem = operand_subword (reg_equiv_constant[regno],
SUBREG_WORD (x), 0,
GET_MODE (SUBREG_REG (x)))) != 0)
- return tem;
+ {
+ if (GET_MODE_CLASS (GET_MODE (SUBREG_REG (x)))
+ != GET_MODE_CLASS (GET_MODE (x)))
+ {
+ if (rtx_equal_p (tem, CONST0_RTX (GET_MODE (SUBREG_REG (x)))))
+ return CONST0_RTX (GET_MODE (x));
+ else
+ /* At most, we can have INT and FLOAT have the same
+ bit representation for constant 0. Anything else
+ probably is a bug. */
+ abort ();
+ }
+ return tem;
+ }
/* If the SUBREG is wider than a word, the above test will fail.
For example, we might have a SImode SUBREG of a DImode SUBREG_REG