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Re: patch: alpha haifa abort
- To: David Edelsohn <dje at watson dot ibm dot com>
- Subject: Re: patch: alpha haifa abort
- From: Jeffrey A Law <law at cygnus dot com>
- Date: Sun, 04 Jan 1998 16:53:20 -0700
- cc: John Carr <jfc at tiac dot net>, Richard Henderson <rth at cygnus dot com>, egcs at cygnus dot com
- Reply-To: law at cygnus dot com
In message <9801042347.AA25082@rios1.watson.ibm.com>you write:
> >>>>> Jeffrey A Law writes:
>
> Jeff> The "trick" is to define an intermediate pattern so that combine
> Jeff> will do a 2/3 -> 1 to create the intermediate pattern. If that
> Jeff> is successful combine will then try to combine the intermediate
> Jeff> pattern with the 4th insn.
>
> Doesn't the intermediate pattern need to be a valid instruction?
> Mike and I went into this issue as well.
Absolutely. I ran into this with the H8 mac stuff. The questions you
have to ask are how expensive is it to handle a false positive, how many
false positives are typically encountered, and how many times you can
actually generate the real instruction.
> I also remember some complexities due to other GCC optimizations
> of the RTL generated for the shift-or way of writing the code.
Yea. That would make this one a little trickier. Maybe the place to
do this is in the simplify_blah routines. Dunno.
jeff