This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: my EGCS status (really Fortran patches)
- To: law at cygnus dot com
- Subject: Re: my EGCS status (really Fortran patches)
- From: Toon Moene <toon at moene dot indiv dot nluug dot nl>
- Date: Thu, 23 Oct 97 07:52:36 +0200
- Cc: egcs at cygnus dot com
- Organization: Moene Computational Physics, Maartensdijk, The Netherlands
- References: <4712.877581304@hurl.cygnus.com>
Jeff,
L$0009
fldds,ma 8(0,%r26),%fr24
fldds,ma 8(0,%r24),%fr23
fldds 0(0,%r25),%fr22
fmpy,dbl %fr24,%fr23,%fr23
fldds,ma 8(0,%r23),%fr25
fsub,dbl %fr22,%fr23,%fr22
fmpy,dbl %fr22,%fr25,%fr22
fstds,ma %fr22,8(0,%r25)
fldds,ma 8(0,%r22),%fr23
fldds 0(0,%r20),%fr22
fmpy,dbl %fr24,%fr23,%fr24
fsub,dbl %fr22,%fr24,%fr22
fmpy,dbl %fr22,%fr25,%fr22
addib,>= -1,%r28,L$0009
fstds,ma %fr22,8(0,%r20)
> Now, I don't actually know if one version executes any
> faster than the other -- this is just something I noticed
> when looking for why tomcatv ran 10% slower with the USE
> patch.
[ I once saw HP-PA assembler before, about a year ago, because
someone complained to the g77-bug list that he couldn't get Fortran
code with assigned goto's to assemble - turned out the HP assembler
can't cope with forward labels in instructions other than jumps. So
take this with a grain of salt ]
I gather, from looking at this code that instructions ending in .ma
do (implicit) post-increment addressing ? That would explain a
lot: The instructions normally associated with updating address
registers can be interspersed between the floating point ops, which
is a win on a CPU that has separate integer and floating point
units. You lose this advantage when these integer instructions
aren't explicit. On the m68k post-increment addressing is a real
win, because you're actually saving instructions. Seems that HP
wanted the best of both worlds ... and lost (wonder how they solve
this themselves ...)
I don't see a simple way out of this.
HTH,
Toon.