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Re: base + index register addressing
- To: meissner at cygnus dot com
- Subject: Re: base + index register addressing
- From: Jeffrey A Law <law at cygnus dot com>
- Date: Fri, 17 Oct 1997 10:10:11 -0600
- cc: michaelh at ongaonga dot chch dot cri dot nz, egcs at cygnus dot com, gcc2 at cygnus dot com
- Reply-To: law at cygnus dot com
In message <199710171559.LAA25330@tweedledumb.cygnus.com>you write:
> |
> | In message <199710170919.WAA23619@ongaonga.chch.cri.nz>you write:
> | >
> | > Here's a patch that I've found that improves register allocation
> | > where the memory address is the sum of two registers.
> | Don't forgot those ChangeLog entries!
> |
> | I've installed this patch into egcs.
>
> I was going to comment that the patch might be even better, if it
> dealt with register + scaled register that some machines have (such
> as the x86, ns32k, 88k to name the ones I've dealt with).
It's worth noting that patch only helps when the base/index is a hard reg,
which limits its usefulness on most of our platforms. It's unclear if
the benefit for handling scaled register would outweigh the work involved.
jeff