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Subreg hard register allocation
- To: egcs at cygnus dot com
- Subject: Subreg hard register allocation
- From: "Michael P. Hayes" <michaelh at ongaonga dot chch dot cri dot nz>
- Date: Mon, 13 Oct 1997 17:34:39 +1300
I've completed adding long long support to my C4x port and have found
that register allocation is poor---registers are being needlessly
copied. For example, here's the output of flow for
long long foo(long long bar) {return bar}
Here pseudo reg. 36 should be assigned to hard reg pair R0/R1
but this is not done by the register allocator. Have I overlooked
something obvious? (Note, HImode on the C4x is 64 bits since
QImode is 32 bits).
Register 36 used 6 times across 7 insns in block 0; 2 bytes.
1 basic blocks.
Basic block 0: first insn 3, last 17.
Reached from blocks:
Registers live at start: 11 20
(note 2 0 3 "" NOTE_INSN_DELETED)
;; Start of basic block 0, registers live: 11 [ar3] 20 [sp]
(insn 3 2 5 (clobber (reg/v:HI 36)) -1 (nil)
(nil))
(insn 5 3 7 (set (subreg:QI (reg/v:HI 36) 0)
(mem:QI (plus:QI (reg:QI 11 ar3)
(const_int -3)))) 3 {*movqi_noclobber} (insn_list 3 (nil))
(nil))
(insn 7 5 8 (set (subreg:QI (reg/v:HI 36) 1)
(mem:QI (plus:QI (reg:QI 11 ar3)
(const_int -2)))) 3 {*movqi_noclobber} (insn_list 5 (nil))
(nil))
(note 8 7 9 "" NOTE_INSN_FUNCTION_BEG)
(note 9 8 11 "" NOTE_INSN_DELETED)
(note 11 9 12 "" NOTE_INSN_DELETED)
(insn 12 11 14 (clobber (reg/i:HI 0 r0)) -1 (nil)
(nil))
(insn 14 12 16 (set (subreg:QI (reg/i:HI 0 r0) 0)
(subreg:QI (reg/v:HI 36) 0)) 3 {*movqi_noclobber} (insn_list 7 (insn_list 12 (nil)))
(expr_list:REG_DEAD (reg/v:HI 36)
(nil)))
(insn 16 14 17 (set (subreg:QI (reg/i:HI 0 r0) 1)
(mem:QI (plus:QI (reg:QI 11 ar3)
(const_int -2)))) 3 {*movqi_noclobber} (insn_list 14 (nil))
(nil))
(insn 17 16 0 (use (reg/i:HI 0 r0)) -1 (insn_list 16 (nil))
(expr_list:REG_DEAD (reg/i:HI 0 r0)
(nil)))
;; End of basic block 0