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RE: target/8272: Unrecognized x86 instructions
- From: Tomás Palmer <Tpalmer at widevine dot com>
- To: nobody at gcc dot gnu dot org
- Cc: gcc-prs at gcc dot gnu dot org,
- Date: 22 Oct 2002 17:06:02 -0000
- Subject: RE: target/8272: Unrecognized x86 instructions
- Reply-to: Tomás Palmer <Tpalmer at widevine dot com>
The following reply was made to PR target/8272; it has been noted by GNATS.
From: =?iso-8859-1?Q?Tom=E1s_Palmer?= <Tpalmer@widevine.com>
To: "'rth@gcc.gnu.org'" <rth@gcc.gnu.org>, "'gcc-bugs@gcc.gnu.org'"
<gcc-bugs@gcc.gnu.org>, "'gcc-prs@gcc.gnu.org'" <gcc-prs@gcc.gnu.org>,
"'nobody@gcc.gnu.org'" <nobody@gcc.gnu.org>, =?iso-8859-1?Q?Tom=E1s_Pa?=
=?iso-8859-1?Q?lmer?= <Tpalmer@widevine.com>, "'gcc-gnats@gcc.gnu.org'"
<gcc-gnats@gcc.gnu.org>
Cc:
Subject: RE: target/8272: Unrecognized x86 instructions
Date: Tue, 22 Oct 2002 09:58:51 -0700
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I disagree. While I might buy that it is the fact that the default of the
compiler is 386 on an Intel86 platform rather than 486+ might prevent these
specific instructions. I am checking out that theory today now that I have
documents for Gcc.
The ASM instructions are correct as sent to you and assemble in-line with
both Microsoft,Intel and other compilers in both Intel and ATT format.
If my theory about the cpu flag does not address this issue then I am
re-filing this bug and hope it gets assigned to someone with some ability to
properly verify a test scenario rather than just guess.
-----Original Message-----
From: rth@gcc.gnu.org [mailto:rth@gcc.gnu.org]
Sent: Tuesday, October 22, 2002 12:06 AM
To: gcc-bugs@gcc.gnu.org; gcc-prs@gcc.gnu.org; nobody@gcc.gnu.org;
tpalmer@widevine.com
Subject: Re: target/8272: Unrecognized x86 instructions
Synopsis: Unrecognized x86 instructions
State-Changed-From-To: open->closed
State-Changed-By: rth
State-Changed-When: Tue Oct 22 00:06:05 2002
State-Changed-Why:
No test case. And it's almost certainly a problem of
invalid inline assembly rather than a compiler bug.
http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&p
r=8272
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<P><FONT SIZE=3D2>I disagree. While I might buy that it is the fact =
that the default of the compiler is 386 on an Intel86 platform rather =
than 486+ might prevent these specific instructions. I am checking out =
that theory today now that I have documents for Gcc.</FONT></P>
<P><FONT SIZE=3D2>The ASM instructions are correct as sent to you and =
assemble in-line with both Microsoft,Intel and other compilers in both =
Intel and ATT format.</FONT></P>
<P><FONT SIZE=3D2>If my theory about the cpu flag does not address this =
issue then I am re-filing this bug and hope it gets assigned to someone =
with some ability to properly verify a test scenario rather than just =
guess.</FONT></P>
<BR>
<BR>
<BR>
<BR>
<P><FONT SIZE=3D2>-----Original Message-----</FONT>
<BR><FONT SIZE=3D2>From: rth@gcc.gnu.org [<A =
HREF=3D"mailto:rth@gcc.gnu.org";>mailto:rth@gcc.gnu.org</A>] </FONT>
<BR><FONT SIZE=3D2>Sent: Tuesday, October 22, 2002 12:06 AM</FONT>
<BR><FONT SIZE=3D2>To: gcc-bugs@gcc.gnu.org; gcc-prs@gcc.gnu.org; =
nobody@gcc.gnu.org; tpalmer@widevine.com</FONT>
<BR><FONT SIZE=3D2>Subject: Re: target/8272: Unrecognized x86 =
instructions</FONT>
</P>
<P><FONT SIZE=3D2>Synopsis: Unrecognized x86 instructions</FONT>
</P>
<P><FONT SIZE=3D2>State-Changed-From-To: open->closed</FONT>
<BR><FONT SIZE=3D2>State-Changed-By: rth</FONT>
<BR><FONT SIZE=3D2>State-Changed-When: Tue Oct 22 00:06:05 2002</FONT>
<BR><FONT SIZE=3D2>State-Changed-Why:</FONT>
<BR><FONT SIZE=3D2> No test case. And it's =
almost certainly a problem of</FONT>
<BR><FONT SIZE=3D2> invalid inline assembly rather =
than a compiler bug.</FONT>
</P>
<P><FONT SIZE=3D2><A =
HREF=3D"http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=3Dview%20audit-trail&=
database=3Dgcc&pr=3D8272" =
TARGET=3D"_blank">http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=3Dview%20au=
dit-trail&database=3Dgcc&pr=3D8272</A></FONT>
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