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c/7831: GCC 3.2 MIPS64 endian issues


>Number:         7831
>Category:       c
>Synopsis:       GCC 3.2 MIPS64 endian issues
>Confidential:   no
>Severity:       serious
>Priority:       medium
>Responsible:    unassigned
>State:          open
>Class:          wrong-code
>Submitter-Id:   net
>Arrival-Date:   Wed Sep 04 18:56:00 PDT 2002
>Closed-Date:
>Last-Modified:
>Originator:     Carl van Schaik
>Release:        gcc version 3.2
>Organization:
>Environment:
x86 host, mips64el-l4-elf-gcc crosscompiler
Configured with: ./configure --target=mips64el-l4-elf --enable-64-bit-bfd --enable-languages=c --with-gnu-as --with-gnu-ld : (reconfigured) ./configure --target=mips64el-l4-elf --enable-64-bit-bfd --enable-languages=c --with-gnu-as --with-gnu-ld --prefix=/usr/local/mips : (reconfigured) ./configure --target=mips64el-l4-elf --enable-64-bit-bfd --enable-languages=c --with-gnu-as --with-gnu-ld --prefix=/usr/local/mips : (reconfigured) ./configure --target=mips64el-l4-elf --enable-64-bit-bfd --enable-languages=c,c++ --with-gnu-as --with-gnu-ld --prefix=/usr/local/mips
>Description:
gcc compiled to default to little endian, but is producing some big-endian load/stores.

Specific problem was fixed by specifiing "-EL" compiler flag.
Assembler code showed:
    1fc8:       ffa20030        sd      v0,48(sp)
...
    1fe4:       dfa20008        ld      v0,8(sp)
    1fe8:       0002103e        dsrl32  v0,v0,0x0
...
    1ffc:       dfa30008        ld      v1,8(sp)
    2000:       8fa20030        lw      v0,52(sp) <- error here, should be 48(sp)
    2004:       00431016        dsrlv   v0,v1,v0
>How-To-Repeat:
with no optimizations, the extracted code would be equivalent to:
word_t = unsigned long int

word_t i = 32;
printf("x = %x\n", (word_t) vaddr >> 32);
printf("x = %x  %x\n", (word_t) vaddr >> i, i);
>Fix:

>Release-Note:
>Audit-Trail:
>Unformatted:


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