This is the mail archive of the
gcc-prs@gcc.gnu.org
mailing list for the GCC project.
target/2246: Code generated for IA64 doesn't reset NaT bit on scratch reg
- To: gcc-gnats at gcc dot gnu dot org
- Subject: target/2246: Code generated for IA64 doesn't reset NaT bit on scratch reg
- From: sje at cup dot hp dot com
- Date: 9 Mar 2001 22:34:34 -0000
- Reply-To: sje at cup dot hp dot com
>Number: 2246
>Category: target
>Synopsis: Code generated for IA64 doesn't reset NaT bit on scratch reg
>Confidential: no
>Severity: serious
>Priority: medium
>Responsible: unassigned
>State: open
>Class: wrong-code
>Submitter-Id: net
>Arrival-Date: Fri Mar 09 14:36:00 PST 2001
>Closed-Date:
>Last-Modified:
>Originator: sje@cup.hp.com
>Release: 2.97 20010207 (experimental)
>Organization:
>Environment:
IA64 Linux
>Description:
The compiler is using a scratch register after a call in
two successive mix instructions. This modifies/sets all the
bits of that register but does not reset the NaT bit because
the register is also used as the input to those two mix
instructions.
>How-To-Repeat:
Compile the code with no optimizations on an IA64 system
and examine the resulting assembly code. After the call to
bar you should see "mix4.l r15 = r15, r16", since r15 is
a scratch register it might have the NaT bit set and this
instruction propogates that NaT bit setting.
>Fix:
>Release-Note:
>Audit-Trail:
>Unformatted:
----gnatsweb-attachment----
Content-Type: text/plain; name="a.c"
Content-Disposition: inline; filename="a.c"
struct s {
int i;
int j;
};
struct s foo()
{
struct s l;
l.i = 0;
l.j = 0;
bar();
return l;
}