This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [PATCH, AArch64 10/11] aarch64: Implement TImode compare-and-swap
- From: Matthew Malcomson <matthew dot malcomson at arm dot com>
- To: rth7680 at gmail dot com, gcc-patches at gcc dot gnu dot org
- Cc: ramana dot radhakrishnan at arm dot com, agraf at suse dot de, matz at suse dot de, Richard Henderson <richard dot henderson at linaro dot org>, nd <nd at arm dot com>
- Date: Mon, 1 Oct 2018 14:41:53 +0100
- Subject: Re: [PATCH, AArch64 10/11] aarch64: Implement TImode compare-and-swap
- References: <20180926050355.32746-1-richard.henderson@linaro.org> <20180926050355.32746-11-richard.henderson@linaro.org>
Hi Richard,
On 26/09/18 06:03, rth7680@gmail.com wrote:
From: Richard Henderson <richard.henderson@linaro.org>
This pattern will only be used with the __sync functions, because
we do not yet have a bare TImode atomic load.
Does this mean that the libatomic `defined(atomic_compare_exchange_n)`
checks would return false for 16 bytes sizes?
(the acinclude.m4 file checks for __atomic_compare_exchange_n)
You would know better than I, but if that's the case it seems that the
atomic_{load,store}_16 implementations in libatomic would still use the
locking ABI, and e.g. atomic_load_16 could be interrupted by using the
CASP instruction to produce an incorrect value.