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[ARM/FDPIC v2 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
- From: <christophe dot lyon at st dot com>
- To: <gcc-patches at gcc dot gnu dot org>
- Cc: <christophe dot lyon at linaro dot org>
- Date: Fri, 13 Jul 2018 18:11:08 +0200
- Subject: [ARM/FDPIC v2 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
- References: <20180713161136.29104-1-christophe.lyon@st.com>
From: Christophe Lyon <christophe.lyon@linaro.org>
Without this, when we are unwinding across a signal frame we can jump
to an even address which leads to an exception.
This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
PC from the signal frame since the PC saved by the kernel has the LSB
bit set to zero.
2018-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
libgcc/
* config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle v7m
architecture.
Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea
diff --git a/libgcc/config/arm/unwind-arm.c b/libgcc/config/arm/unwind-arm.c
index 564e4f13..6da6e3d 100644
--- a/libgcc/config/arm/unwind-arm.c
+++ b/libgcc/config/arm/unwind-arm.c
@@ -198,6 +198,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context *context,
return _UVRSR_FAILED;
vrs->core.r[regno] = *(_uw *) valuep;
+#if defined(__ARM_ARCH_7M__)
+ /* Force LSB bit since we always run thumb code. */
+ if (regno == 15)
+ vrs->core.r[regno] |= 1;
+#endif
return _UVRSR_OK;
case _UVRSC_VFP:
--
2.6.3