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[PATCH , rs6000] Add builtin tests for vec_madds, vec_extract_fp32_from_shortl and vec_extract_fp32_from_shorth, vec_xst_be


GCC maintainers:

The following patch adds additional tests for the vec_madds,
vec_extract_fp32_from_shortl and vec_extract_fp32_from_shorth,
vec_xst_be builtin functions.

The patch was retested on:

    powerpc64le-unknown-linux-gnu (Power 8 LE)   
    powerpc64le-unknown-linux-gnu (Power 9 LE)
    powerpc64-unknown-linux-gnu (Power 8 BE)

With no regressions.

Please let me know if the patch looks OK for GCC mainline.

                         Carl Love
---------------------------------------------------------------

gcc/testsuite/ChangeLog:

2018-05-21  Carl Love  <cel@us.ibm.com>
	* gcc.target/powerpc/altivec-35.c (foo): Add builtin test vec_madds.
	* gcc.target/powerpc/builtins-3-p9.c (main): Add tests for
	vec_extract_fp32_from_shortl and vec_extract_fp32_from_shorth.
	* gcc.target/powerpc/builtins-6-runnable.c (main): Fix typo for output.
	Add vec_xst_be for signed and unsigned arguments.
---
 gcc/testsuite/gcc.target/powerpc/altivec-35.c      |  4 ++
 .../gcc.target/powerpc/builtins-3-p9-runnable.c    | 16 ++++++
 .../gcc.target/powerpc/builtins-6-runnable.c       | 62 +++++++++++++++++++---
 3 files changed, 74 insertions(+), 8 deletions(-)

diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-35.c b/gcc/testsuite/gcc.target/powerpc/altivec-35.c
index 46e8eed..0836528 100644
--- a/gcc/testsuite/gcc.target/powerpc/altivec-35.c
+++ b/gcc/testsuite/gcc.target/powerpc/altivec-35.c
@@ -1,3 +1,4 @@
+
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_altivec_ok } */
 /* { dg-options "-maltivec -mno-vsx -mno-power8-vector -O0" } */
@@ -19,7 +20,10 @@ void foo (vector signed int *vsir,
   *vssr++ = vec_madd (vssa, vusb, vusc);
   *vssr++ = vec_madd (vusa, vssb, vssc);
   *vusr++ = vec_madd (vusa, vusb, vusc);
+
+  *vssr++ = vec_madds (vssa, vssb, vssc);
 }
 
 /* { dg-final { scan-assembler-times "vaddcuw" 1 } } */
 /* { dg-final { scan-assembler-times "vmladduhm" 4 } } */
+/* { dg-final { scan-assembler-times "vmhaddshs" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-3-p9-runnable.c b/gcc/testsuite/gcc.target/powerpc/builtins-3-p9-runnable.c
index 3b67e53..e29c97c 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-3-p9-runnable.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-3-p9-runnable.c
@@ -32,4 +32,20 @@ int main() {
       if (vfr[i] != vfexpt[i])
          abort();
    }
+
+   vfexpt = (vector float){1.0, -2.0, 0.0, 8.5};
+   vfr = vec_extract_fp32_from_shorth(vusha);
+
+   for (i=0; i<4; i++) {
+      if (vfr[i] != vfexpt[i])
+	 abort();
+   }
+
+   vfexpt = (vector float){1.5, 0.5, 1.25, -0.25};
+   vfr = vec_extract_fp32_from_shortl(vusha);
+
+   for (i=0; i<4; i++) {
+      if (vfr[i] != vfexpt[i])
+	 abort();
+   } 
 }
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-6-runnable.c b/gcc/testsuite/gcc.target/powerpc/builtins-6-runnable.c
index 5d31312..380a11a 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-6-runnable.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-6-runnable.c
@@ -60,11 +60,11 @@ void print_uc (vector unsigned char vec_expected,
 {
   int i;
 
-  printf("expected signed char data\n");
+  printf("expected unsigned char data\n");
   for (i = 0; i < 16; i++)
     printf(" %d,", vec_expected[i]);
 
-  printf("\nactual signed char data\n");
+  printf("\nactual unsigned char data\n");
   for (i = 0; i < 16; i++)
     printf(" %d,", vec_actual[i]);
   printf("\n");
@@ -197,13 +197,11 @@ void print_ull (vector unsigned long long vec_expected,
 
   printf("expected unsigned long long data\n");
   for (i = 0; i < 2; i++)
-	  //    printf(" %llu,", vec_expected[i]);
-    printf(" 0x%llx,", vec_expected[i]);
+    printf(" %llu,", vec_expected[i]);
 
   printf("\nactual unsigned long long data\n");
   for (i = 0; i < 2; i++)
-	  //    printf(" %llu,", vec_actual[i]);
-    printf("0x %llx,", vec_actual[i]);
+    printf(" %llu,", vec_actual[i]);
   printf("\n");
 }
 
@@ -745,6 +743,56 @@ int main() {
 #endif
      }
 
+   disp = 8;
+#ifdef __BIG_ENDIAN__
+   vec_si_expected1 = (vector signed int){  0, 0, -8, -7 };
+#else
+   vec_si_expected1 = (vector signed int){  0, 0, -5, -6 };
+#endif
+   store_data_si = (vector signed int){ -8, -7, -6, -5 };
+
+   for (i=0; i<4; i++)
+     vec_si_result1[i] = 0;
+
+   address_si = &vec_si_result1[0];
+
+   vec_xst_be (store_data_si, disp, address_si);
+
+   if (result_wrong_si (vec_si_expected1, vec_si_result1))
+     {
+#ifdef DEBUG
+       printf("Error: vec_xst_be, si disp = %d, result does not match expected result\n", disp);
+       print_si (vec_si_expected1, vec_si_result1);
+#else
+       abort();
+#endif
+     }
+
+   disp = 0;
+#ifdef __BIG_ENDIAN__
+   vec_ui_expected1 = (vector unsigned int){ 0, 1, 2, 3 };
+#else
+   vec_ui_expected1 = (vector unsigned int){ 3, 2, 1, 0 };
+#endif
+   store_data_ui = (vector unsigned int){ 0, 1, 2, 3 };
+
+   for (i=0; i<4; i++)
+     vec_ui_result1[i] = 0;
+
+   address_ui = &vec_ui_result1[0];
+
+   vec_xst_be (store_data_ui, disp, address_ui);
+
+   if (result_wrong_ui (vec_ui_expected1, vec_ui_result1))
+     {
+#ifdef DEBUG
+       printf("Error: vec_xst_be, ui disp = 0, result does not match expected result\n");
+       print_ui (vec_ui_expected1, vec_ui_result1);
+#else
+       abort();
+#endif
+     }
+
    disp = 0;
 #ifdef __BIG_ENDIAN__
    vec_ss_expected1 = (vector signed short int){ -4, -3, -2, -1, 0, 1, 2, 3 };
@@ -972,7 +1020,6 @@ int main() {
 #endif
      }
 
-#if 0
    disp = 0;
 #ifdef __BIG_ENDIAN__
    vec_f_expected1 = (vector float){ 0.0, 1.2, 2.3, 3.4 };
@@ -997,5 +1044,4 @@ int main() {
        abort();
 #endif
      }
-#endif
 }
-- 
2.7.4


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