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Re: [PATCH, rs6000] Map dcbtst, dcbtt to n2=0 for __builtin_prefetch builtin.
- From: Segher Boessenkool <segher at kernel dot crashing dot org>
- To: Carl Love <cel at us dot ibm dot com>
- Cc: gcc-patches at gcc dot gnu dot org, David Edelsohn <dje dot gcc at gmail dot com>, Bill Schmidt <wschmidt at linux dot vnet dot ibm dot com>
- Date: Tue, 8 May 2018 11:24:01 -0500
- Subject: Re: [PATCH, rs6000] Map dcbtst, dcbtt to n2=0 for __builtin_prefetch builtin.
- References: <1525725295.4827.4.camel@us.ibm.com>
Hi Carl,
On Mon, May 07, 2018 at 01:34:55PM -0700, Carl Love wrote:
> This patch maps n2=0 to generate the dcbtstt mnemonic (dcbst for TH
> value of 0b10000) for a write prefetch and dcbtst for n2 in range
> [1,3].
>
> The dcbtt mnemonic (dcbt for TH value of 0b10000) is generated for a
> read prefetch when n2=0 and the dbct instruction is generated for n2 in
> range [1,3].
>
> The ISA states that the value TH = 0b10000 is a hint that the processor
> will probably soon perform a load from the addressed block.
(s/dcbst/dcbtst/). Yup, sounds good.
> The regression testing of the patch was done on
>
> powerpc64le-unknown-linux-gnu (Power 8 LE)
>
> with no regressions.
What ISA version is required for the TH field to do anything? Will
it work on older machines too (just ignored)? What assembler version
is required?
> 2018-05-07 Carl Love <cel@us.ibm.com>
>
> * config/rs6000/rs6000.md: Add dcbtst, dcbtt instruction generation
> to define_insn prefetch.
* config/rs6000/rs6000.md (prefetch): Generate dcbtt and dcbtstt instructions
if operands[2] is 0.
or similar.
> diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
> index 2b15cca..7429d33 100644
> --- a/gcc/config/rs6000/rs6000.md
> +++ b/gcc/config/rs6000/rs6000.md
> @@ -13233,10 +13233,19 @@
> (match_operand:SI 2 "const_int_operand" "n"))]
> ""
> {
> - if (GET_CODE (operands[0]) == REG)
> - return INTVAL (operands[1]) ? "dcbtst 0,%0" : "dcbt 0,%0";
> - return INTVAL (operands[1]) ? "dcbtst %a0" : "dcbt %a0";
> -}
> + if (GET_CODE (operands[0]) == REG) {
Use REG_P please.
The correct formatting is
if (this)
{
something;
}
else
{
whatever;
}
> + if (INTVAL (operands[1]) == 0)
You can also say
if (operands[1] == const0_rtx)
if that is easier to read.
> + }
> + }
If you do indenting right there never is a single space indent difference
(always is even).
It's a pity we need to decide between %a0 and not. Hardly seems worth
making another output modifier for though.
Segher