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Re: [PATCH][AArch64] PR target/85512: Tighten SIMD right shift immediate constraints


On Tue, Apr 24, 2018 at 05:22:15PM +0100, Kyrill Tkachov wrote:
> I've cleaned up the testcase a bit to leave only the function that generates the invalid instruction,
> making it shorter.
> 
> Jakub, is the patch ok to go in for GCC 8 from your perspective?

The PR is marked P1 now, so sure, please commit this for GCC 8, the sooner
the better.  We have only one other P1 left.

The only thing I'm unsure about is whether you want to make the top of the
range 32 and 64 rather than just 31 and 63, after all the operand
predicate used there requires < 32 and < 64, and from middle-end's POV
shifts by 32 or 64 are undefined (unless SHIFT_COUNT_TRUNCATED, but
aarch64 defines it to
#define SHIFT_COUNT_TRUNCATED (!TARGET_SIMD)

So, using
(match_test "IN_RANGE (ival, 1, 31)")))
and
(match_test "IN_RANGE (ival, 1, 63)")))
would feel safer to me, but your call.

> > > 2018-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
> > > 
> > >       PR target/85512
> > >       * config/aarch64/constraints.md (Usg, Usj): New constraints.
> > >       * config/aarch64/iterators.md (cmode_simd): New mode attribute.
> > >       * config/aarch64/aarch64.md (*aarch64_ashr_sisd_or_int_<mode>3):
> > >       Use the above on operand 2.  Reindent.
> > >       (*aarch64_lshr_sisd_or_int_<mode>3): Likewise.
> > > 
> > > 2018-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
> > > 
> > >       PR target/85512
> > >       * gcc.dg/pr85512.c: New test.
> 


	Jakub


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