[wwwdocs] gcc-8/changes.html - typos,...

[Gerald Pfeifer <gerald at pfeifer dot com>]

This fixes a couple of typos, informal language (regs instead of
registers,...),... in our GCC 8 release notes.

Committed.

Gerald

Index: changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-8/changes.html,v
retrieving revision 1.49
diff -u -r1.49 changes.html
--- changes.html	1 Apr 2018 21:33:42 -0000	1.49
+++ changes.html	1 Apr 2018 22:17:59 -0000
@@ -134,7 +134,7 @@
     has a "frame" in the group segment offset to which is given as an
     argument, similar to traditional call stack frame handling.</li>
   <li>Reduce the number of type conversions due to
-    the untyped HSAIL regs. Instead of always representing the HSAIL's
+    the untyped HSAIL registers. Instead of always representing the HSAIL's
     untyped registers as unsigned int, the gccbrig now pre-analyzes
     the BRIG code and builds the register variables as a type used
     the most when storing or reading data to/from each register.
@@ -146,10 +146,10 @@
     which refer only to offset 0.</li>
   <li>Fixed a bug with reg+offset addressing on 32b segments.
     In 'large' mode, the offset is treated as 32bits unless it's
-    in global, readonly or kernarg address space.</li>
+    in global, read-only or kernarg address space.</li>
   <li>Fixed a crash caused sometimes by calls with more
-    than 4 args.</li>
-  <li>Fixed a misexecution issue with kernels that have
+    than 4 arguments.</li>
+  <li>Fixed a mis-execution issue with kernels that have
     both unexpanded ID functions and calls to subfunctions.</li>
   <li>Treat HSAIL barrier builtins as setjmp/longjump style
     functions to avoid illegal optimizations.</li>
@@ -492,7 +492,7 @@
   <li>
     Better tuning for <code>znver1</code> and Intel Core based CPUs.</li>
   <li>
-    Vectorization cost metrics has been reworked leading to significant improvments
+    Vectorization cost metrics has been reworked leading to significant improvements
     on some benchmarks.</li>
   <li>GCC now supports the Intel CPU named Cannonlake through
     <code>-march=cannonlake</code>. The switch enables the AVX512VBMI,