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[patch committed FT32] Add FT32B support
- From: James Bowman <james dot bowman at ftdichip dot com>
- To: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Thu, 2 Nov 2017 19:42:12 +0000
- Subject: [patch committed FT32] Add FT32B support
- Authentication-results: sourceware.org; auth=none
FT32B is a new FT32 architecture type. Ft32B has a code compression
scheme which uses linker relaxations. It also has a security option to
prevent reads from program memory.
[gcc]
2017-11-02 James Bowman <james.bowman@ftdichip.com>
* config/ft32/ft32.c (ft32_addr_space_legitimate_address_p): increase
offset range for FT32B.
* config/ft32/ft32.h: option "mcompress" enables relaxation.
* config/ft32/ft32.md: Add TARGET_NOPM.
* config/ft32/ft32.opt: Add mft32b, mcompress, mnopm.
* gcc/doc/invoke.texi: Add mft32b, mcompress, mnopm.
Index: gcc/config/ft32/ft32.c
===================================================================
--- gcc/config/ft32/ft32.c (revision 254348)
+++ gcc/config/ft32/ft32.c (working copy)
@@ -866,6 +866,8 @@
ft32_addr_space_legitimate_address_p (machine_mode mode, rtx x, bool strict,
addr_space_t as ATTRIBUTE_UNUSED)
{
+ int max_offset = TARGET_FT32B ? 16384 : 128;
+
if (mode != BLKmode)
{
if (GET_CODE (x) == PLUS)
@@ -875,8 +877,9 @@
op2 = XEXP (x, 1);
if (GET_CODE (op1) == REG
&& CONST_INT_P (op2)
- && INTVAL (op2) >= -128
- && INTVAL (op2) < 128 && reg_ok_for_base_p (op1, strict))
+ && (-max_offset <= INTVAL (op2))
+ && (INTVAL (op2) < max_offset)
+ && reg_ok_for_base_p (op1, strict))
goto yes;
if (GET_CODE (op1) == SYMBOL_REF && CONST_INT_P (op2))
goto yes;
Index: gcc/config/ft32/ft32.h
===================================================================
--- gcc/config/ft32/ft32.h (revision 254348)
+++ gcc/config/ft32/ft32.h (working copy)
@@ -39,6 +39,7 @@
#undef LIB_SPEC
#define LIB_SPEC "%{!shared:%{!symbolic:-lc}} \
+ %{mcompress:--relax} \
%{msim:-Tsim.ld}"
#undef LINK_SPEC
@@ -199,12 +200,12 @@
#define GLOBAL_ASM_OP "\t.global\t"
-#define JUMP_TABLES_IN_TEXT_SECTION 1
+#define JUMP_TABLES_IN_TEXT_SECTION (TARGET_NOPM ? 0 : 1)
/* This is how to output an element of a case-vector that is absolute. */
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
- fprintf (FILE, "\tjmp\t.L%d\n", VALUE); \
+ fprintf (FILE, "\t.long\t.L%d\n", VALUE); \
/* Passing Arguments in Registers */
@@ -469,7 +470,7 @@
#define ADDR_SPACE_PM 1
#define REGISTER_TARGET_PRAGMAS() do { \
- c_register_addr_space ("__flash__", ADDR_SPACE_PM); \
+ c_register_addr_space ("__flash__", TARGET_NOPM ? 0 : ADDR_SPACE_PM); \
} while (0);
extern int ft32_is_mem_pm(rtx o);
Index: gcc/config/ft32/ft32.md
===================================================================
--- gcc/config/ft32/ft32.md (revision 254348)
+++ gcc/config/ft32/ft32.md (working copy)
@@ -777,8 +777,12 @@
(clobber (match_scratch:SI 2 "=&r"))
]
""
- "ldk.l\t$cc,%l1\;ashl.l\t%2,%0,2\;add.l\t%2,%2,$cc\;jmpi\t%2"
- )
+ {
+ if (TARGET_NOPM)
+ return \"ldk.l\t$cc,%l1\;ashl.l\t%2,%0,2\;add.l\t%2,%2,$cc\;ldi.l\t%2,%2,0\;jmpi\t%2\";
+ else
+ return \"ldk.l\t$cc,%l1\;ashl.l\t%2,%0,2\;add.l\t%2,%2,$cc\;lpmi.l\t%2,%2,0\;jmpi\t%2\";
+ })
;; -------------------------------------------------------------------------
;; Atomic exchange instruction
Index: gcc/config/ft32/ft32.opt
===================================================================
--- gcc/config/ft32/ft32.opt (revision 254348)
+++ gcc/config/ft32/ft32.opt (working copy)
@@ -29,3 +29,15 @@
mnodiv
Target Report Mask(NODIV)
Avoid use of the DIV and MOD instructions
+
+mft32b
+Target Report Mask(FT32B)
+target the FT32B architecture
+
+mcompress
+Target Report Mask(COMPRESS)
+enable FT32B code compression
+
+mnopm
+Target Report Mask(NOPM)
+Avoid placing any readable data in program memory
Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi (revision 254348)
+++ gcc/doc/invoke.texi (working copy)
@@ -743,7 +743,7 @@
@gccoptlist{-msmall-model -mno-lsim}
@emph{FT32 Options}
-@gccoptlist{-msim -mlra -mnodiv}
+@gccoptlist{-msim -mlra -mnodiv -mft32b -mcompress -mnopm}
@emph{FRV Options}
@gccoptlist{-mgpr-32 -mgpr-64 -mfpr-32 -mfpr-64 @gol
@@ -17768,6 +17768,18 @@
@opindex mnodiv
Do not use div and mod instructions.
+@item -mft32b
+@opindex mft32b
+Enable use of the extended instructions of the FT32B processor.
+
+@item -mcompress
+@opindex mcompress
+Compress all code using the Ft32B code compression scheme.
+
+@item -mnopm
+@opindex mnopm
+Do not generate code that reads program memory.
+
@end table
@node FRV Options