This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Fix PR rtl-optimization/81803


This is a regression present on the mainline and 7 branch for little-endian 
64-bit MIPS platforms under the form of incorrect spill/reload pairs generated 
by the LRA pass, i.e. for which the spill instruction is a narrower access 
than the reload instruction.  That's incorrect for accesses no wider than a 
word on WORD_REGISTER_OPERATIONS target because all the bits up to the word 
size need to be preserved.

The attached patch fixes the problem by mimicing in curr_insn_transform what 
push_reload does for SUBREGs no wider than a word for WORD_REGISTER_OPERATIONS 
targets, i.e. reloading the whole register and not just the subreg.

Tested on SPARC64/Linux and ARM/EABI (both WORD_REGISTER_OPERATIONS targets).
Unfortunately I don't have access to MIPS hardware anymore and the PR doesn't 
contain any executable testcase.

Applied on the mainline only for now.


2017-10-31  Matthew Fortune  <matthew.fortune@imgtec.com>
            Eric Botcazou  <ebotcazou@adacore.com>

        PR rtl-optimization/81803
        * lra-constraints.c (curr_insn_transform): Also reload the whole
        register for a strict subreg no wider than a word if this is for
        a WORD_REGISTER_OPERATIONS target.

-- 
Eric Botcazou
Index: lra-constraints.c
===================================================================
--- lra-constraints.c	(revision 254193)
+++ lra-constraints.c	(working copy)
@@ -4207,8 +4207,9 @@ curr_insn_transform (bool check_only_p)
 	      reg = SUBREG_REG (*loc);
 	      byte = SUBREG_BYTE (*loc);
 	      if (REG_P (reg)
-		  /* Strict_low_part requires reload the register not
-		     the sub-register.	*/
+		  /* Strict_low_part requires reloading the register and not
+		     just the subreg.  Likewise for a strict subreg no wider
+		     than a word for WORD_REGISTER_OPERATIONS targets.  */
 		  && (curr_static_id->operand[i].strict_low
 		      || (!paradoxical_subreg_p (mode, GET_MODE (reg))
 			  && (hard_regno
@@ -4219,7 +4220,11 @@ curr_insn_transform (bool check_only_p)
 			  && (goal_alt[i] == NO_REGS
 			      || (simplify_subreg_regno
 				  (ira_class_hard_regs[goal_alt[i]][0],
-				   GET_MODE (reg), byte, mode) >= 0)))))
+				   GET_MODE (reg), byte, mode) >= 0)))
+		      || (GET_MODE_PRECISION (mode)
+			  < GET_MODE_PRECISION (GET_MODE (reg))
+			  && GET_MODE_SIZE (GET_MODE (reg)) <= UNITS_PER_WORD
+			  && WORD_REGISTER_OPERATIONS)))
 		{
 		  /* An OP_INOUT is required when reloading a subreg of a
 		     mode wider than a word to ensure that data beyond the

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]