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[041/nnn] poly_int: reload.c
- From: Richard Sandiford <richard dot sandiford at linaro dot org>
- To: gcc-patches at gcc dot gnu dot org
- Date: Mon, 23 Oct 2017 18:18:00 +0100
- Subject: [041/nnn] poly_int: reload.c
- Authentication-results: sourceware.org; auth=none
- References: <871sltvm7r.fsf@linaro.org>
This patch makes a few small poly_int64 changes to reload.c,
such as in the "decomposition" structure. In practice, any
port with polynomial-sized modes should be using LRA rather
than reload, but it's easier to convert reload anyway than
to sprinkle to_constants everywhere.
2017-10-23 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* reload.h (reload::inc): Change from an int to a poly_int64_pod.
* reload.c (combine_reloads, debug_reload_to_stream): Likewise.
(decomposition): Change start and end from HOST_WIDE_INT
to poly_int64_pod.
(decompose, immune_p): Update accordingly.
(find_inc_amount): Return a poly_int64 rather than an int.
* reload1.c (inc_for_reload): Take the inc_amount as a poly_int64
rather than an int.
Index: gcc/reload.h
===================================================================
--- gcc/reload.h 2017-10-23 17:07:40.266433752 +0100
+++ gcc/reload.h 2017-10-23 17:18:51.485721234 +0100
@@ -97,7 +97,7 @@ struct reload
/* Positive amount to increment or decrement by if
reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
Ignored otherwise (don't assume it is zero). */
- int inc;
+ poly_int64_pod inc;
/* A reg for which reload_in is the equivalent.
If reload_in is a symbol_ref which came from
reg_equiv_constant, then this is the pseudo
Index: gcc/reload.c
===================================================================
--- gcc/reload.c 2017-10-23 17:16:50.373527872 +0100
+++ gcc/reload.c 2017-10-23 17:18:51.485721234 +0100
@@ -168,8 +168,8 @@ struct decomposition
int reg_flag; /* Nonzero if referencing a register. */
int safe; /* Nonzero if this can't conflict with anything. */
rtx base; /* Base address for MEM. */
- HOST_WIDE_INT start; /* Starting offset or register number. */
- HOST_WIDE_INT end; /* Ending offset or register number. */
+ poly_int64_pod start; /* Starting offset or register number. */
+ poly_int64_pod end; /* Ending offset or register number. */
};
/* Save MEMs needed to copy from one class of registers to another. One MEM
@@ -278,7 +278,7 @@ static void find_reloads_address_part (r
static rtx find_reloads_subreg_address (rtx, int, enum reload_type,
int, rtx_insn *, int *);
static void copy_replacements_1 (rtx *, rtx *, int);
-static int find_inc_amount (rtx, rtx);
+static poly_int64 find_inc_amount (rtx, rtx);
static int refers_to_mem_for_reload_p (rtx);
static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
rtx, rtx *);
@@ -1772,7 +1772,7 @@ combine_reloads (void)
&& (ira_reg_class_max_nregs [(int)rld[i].rclass][(int) rld[i].inmode]
== ira_reg_class_max_nregs [(int) rld[output_reload].rclass]
[(int) rld[output_reload].outmode])
- && rld[i].inc == 0
+ && known_zero (rld[i].inc)
&& rld[i].reg_rtx == 0
/* Don't combine two reloads with different secondary
memory locations. */
@@ -2360,7 +2360,7 @@ operands_match_p (rtx x, rtx y)
decompose (rtx x)
{
struct decomposition val;
- int all_const = 0;
+ int all_const = 0, regno;
memset (&val, 0, sizeof (val));
@@ -2458,29 +2458,33 @@ decompose (rtx x)
case REG:
val.reg_flag = 1;
- val.start = true_regnum (x);
- if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
+ regno = true_regnum (x);
+ if (regno < 0 || regno >= FIRST_PSEUDO_REGISTER)
{
/* A pseudo with no hard reg. */
val.start = REGNO (x);
val.end = val.start + 1;
}
else
- /* A hard reg. */
- val.end = end_hard_regno (GET_MODE (x), val.start);
+ {
+ /* A hard reg. */
+ val.start = regno;
+ val.end = end_hard_regno (GET_MODE (x), regno);
+ }
break;
case SUBREG:
if (!REG_P (SUBREG_REG (x)))
/* This could be more precise, but it's good enough. */
return decompose (SUBREG_REG (x));
- val.reg_flag = 1;
- val.start = true_regnum (x);
- if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
+ regno = true_regnum (x);
+ if (regno < 0 || regno >= FIRST_PSEUDO_REGISTER)
return decompose (SUBREG_REG (x));
- else
- /* A hard reg. */
- val.end = val.start + subreg_nregs (x);
+
+ /* A hard reg. */
+ val.reg_flag = 1;
+ val.start = regno;
+ val.end = regno + subreg_nregs (x);
break;
case SCRATCH:
@@ -2505,7 +2509,11 @@ immune_p (rtx x, rtx y, struct decomposi
struct decomposition xdata;
if (ydata.reg_flag)
- return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
+ /* In this case the decomposition structure contains register
+ numbers rather than byte offsets. */
+ return !refers_to_regno_for_reload_p (ydata.start.to_constant (),
+ ydata.end.to_constant (),
+ x, (rtx *) 0);
if (ydata.safe)
return 1;
@@ -2536,7 +2544,7 @@ immune_p (rtx x, rtx y, struct decomposi
return 0;
}
- return (xdata.start >= ydata.end || ydata.start >= xdata.end);
+ return must_ge (xdata.start, ydata.end) || must_ge (ydata.start, xdata.end);
}
/* Similar, but calls decompose. */
@@ -7063,7 +7071,7 @@ find_equiv_reg (rtx goal, rtx_insn *insn
within X, and return the amount INCED is incremented or decremented by.
The value is always positive. */
-static int
+static poly_int64
find_inc_amount (rtx x, rtx inced)
{
enum rtx_code code = GET_CODE (x);
@@ -7096,8 +7104,8 @@ find_inc_amount (rtx x, rtx inced)
{
if (fmt[i] == 'e')
{
- int tem = find_inc_amount (XEXP (x, i), inced);
- if (tem != 0)
+ poly_int64 tem = find_inc_amount (XEXP (x, i), inced);
+ if (maybe_nonzero (tem))
return tem;
}
if (fmt[i] == 'E')
@@ -7105,8 +7113,8 @@ find_inc_amount (rtx x, rtx inced)
int j;
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
{
- int tem = find_inc_amount (XVECEXP (x, i, j), inced);
- if (tem != 0)
+ poly_int64 tem = find_inc_amount (XVECEXP (x, i, j), inced);
+ if (maybe_nonzero (tem))
return tem;
}
}
@@ -7267,8 +7275,11 @@ debug_reload_to_stream (FILE *f)
if (rld[r].nongroup)
fprintf (f, ", nongroup");
- if (rld[r].inc != 0)
- fprintf (f, ", inc by %d", rld[r].inc);
+ if (maybe_nonzero (rld[r].inc))
+ {
+ fprintf (f, ", inc by ");
+ print_dec (rld[r].inc, f, SIGNED);
+ }
if (rld[r].nocombine)
fprintf (f, ", can't combine");
Index: gcc/reload1.c
===================================================================
--- gcc/reload1.c 2017-10-23 17:16:50.373527872 +0100
+++ gcc/reload1.c 2017-10-23 17:18:51.486721146 +0100
@@ -398,7 +398,7 @@ static void emit_reload_insns (struct in
static void delete_output_reload (rtx_insn *, int, int, rtx);
static void delete_address_reloads (rtx_insn *, rtx_insn *);
static void delete_address_reloads_1 (rtx_insn *, rtx, rtx_insn *);
-static void inc_for_reload (rtx, rtx, rtx, int);
+static void inc_for_reload (rtx, rtx, rtx, poly_int64);
static void add_auto_inc_notes (rtx_insn *, rtx);
static void substitute (rtx *, const_rtx, rtx);
static bool gen_reload_chain_without_interm_reg_p (int, int);
@@ -9075,7 +9075,7 @@ delete_address_reloads_1 (rtx_insn *dead
This cannot be deduced from VALUE. */
static void
-inc_for_reload (rtx reloadreg, rtx in, rtx value, int inc_amount)
+inc_for_reload (rtx reloadreg, rtx in, rtx value, poly_int64 inc_amount)
{
/* REG or MEM to be copied and incremented. */
rtx incloc = find_replacement (&XEXP (value, 0));
@@ -9105,7 +9105,7 @@ inc_for_reload (rtx reloadreg, rtx in, r
if (GET_CODE (value) == PRE_DEC || GET_CODE (value) == POST_DEC)
inc_amount = -inc_amount;
- inc = GEN_INT (inc_amount);
+ inc = gen_int_mode (inc_amount, Pmode);
}
/* If this is post-increment, first copy the location to the reload reg. */