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Re: [PATCH] Remove useless isa attributes from various sse.md patterns
- From: Uros Bizjak <ubizjak at gmail dot com>
- To: Jakub Jelinek <jakub at redhat dot com>
- Cc: Kirill Yukhin <kirill dot yukhin at gmail dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Fri, 20 Oct 2017 12:17:11 +0200
- Subject: Re: [PATCH] Remove useless isa attributes from various sse.md patterns
- Authentication-results: sourceware.org; auth=none
- References: <20171004193944.GC18588@tucnak>
On Wed, Oct 4, 2017 at 9:39 PM, Jakub Jelinek <jakub@redhat.com> wrote:
> Hi!
>
> While working on the previous patch, I've noticed we have quite a few
> seemingly useless isa attributes (first I've noticed isa attribute
> which had one value for all alternatives, which IMHO should just
> been done in insn condition instead).
>
> fma_avx512f isa is only used on insns that have TARGET_AVX512F && ...
> in their conditions, and the isa has been enabled if:
> TARGET_FMA || TARGET_AVX512F
> so that is clearly satisfied always.
>
> The last hunk had isa avx and TARGET_AVX512BW && in the condition,
> that doesn't make any sense to me either.
>
> And the two hunks before that had avx512f isa, and TARGET_AVX512F && ...
> in the condition.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
>
> 2017-10-04 Jakub Jelinek <jakub@redhat.com>
>
> * config/i386/i386.md (isa): Remove fma_avx512f.
> * config/i386/sse.md (<avx512>_fmadd_<mode>_mask<round_name>,
> <avx512>_fmadd_<mode>_mask3<round_name>,
> <avx512>_fmsub_<mode>_mask<round_name>,
> <avx512>_fmsub_<mode>_mask3<round_name>,
> <avx512>_fnmadd_<mode>_mask<round_name>,
> <avx512>_fnmadd_<mode>_mask3<round_name>,
> <avx512>_fnmsub_<mode>_mask<round_name>,
> <avx512>_fnmsub_<mode>_mask3<round_name>,
> <avx512>_fmaddsub_<mode>_mask<round_name>,
> <avx512>_fmaddsub_<mode>_mask3<round_name>,
> <avx512>_fmsubadd_<mode>_mask<round_name>,
> <avx512>_fmsubadd_<mode>_mask3<round_name>): Remove isa attribute.
> (*vec_widen_umult_even_v16si<mask_name>,
> *vec_widen_smult_even_v16si<mask_name>): Likewise.
> (<mask_codefor>avx512bw_dbpsadbw<mode><mask_name>): Likewise.
OK for mainline as an obvious patch.
Thanks,
Uros.
> --- gcc/config/i386/i386.md.jj 2017-10-04 09:45:55.000000000 +0200
> +++ gcc/config/i386/i386.md 2017-10-04 16:28:36.954551561 +0200
> @@ -798,7 +798,7 @@ (define_attr "movu" "0,1" (const_string
> (define_attr "isa" "base,x64,x64_sse4,x64_sse4_noavx,x64_avx,nox64,
> sse2,sse2_noavx,sse3,sse4,sse4_noavx,avx,noavx,
> avx2,noavx2,bmi,bmi2,fma4,fma,avx512f,noavx512f,
> - fma_avx512f,avx512bw,noavx512bw,avx512dq,noavx512dq,
> + avx512bw,noavx512bw,avx512dq,noavx512dq,
> avx512vl,noavx512vl,x64_avx512dq,x64_avx512bw"
> (const_string "base"))
>
> @@ -832,8 +832,6 @@ (define_attr "enabled" ""
> (eq_attr "isa" "fma") (symbol_ref "TARGET_FMA")
> (eq_attr "isa" "avx512f") (symbol_ref "TARGET_AVX512F")
> (eq_attr "isa" "noavx512f") (symbol_ref "!TARGET_AVX512F")
> - (eq_attr "isa" "fma_avx512f")
> - (symbol_ref "TARGET_FMA || TARGET_AVX512F")
> (eq_attr "isa" "avx512bw") (symbol_ref "TARGET_AVX512BW")
> (eq_attr "isa" "noavx512bw") (symbol_ref "!TARGET_AVX512BW")
> (eq_attr "isa" "avx512dq") (symbol_ref "TARGET_AVX512DQ")
> --- gcc/config/i386/sse.md.jj 2017-10-04 15:34:00.000000000 +0200
> +++ gcc/config/i386/sse.md 2017-10-04 16:21:41.724535506 +0200
> @@ -3720,8 +3720,7 @@ (define_insn "<avx512>_fmadd_<mode>_mask
> "@
> vfmadd132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3, %2<round_op5>}
> vfmadd213<ssemodesuffix>\t{<round_op5>%3, %2, %0%{%4%}|%0%{%4%}, %2, %3<round_op5>}"
> - [(set_attr "isa" "fma_avx512f,fma_avx512f")
> - (set_attr "type" "ssemuladd")
> + [(set_attr "type" "ssemuladd")
> (set_attr "mode" "<MODE>")])
>
> (define_insn "<avx512>_fmadd_<mode>_mask3<round_name>"
> @@ -3735,8 +3734,7 @@ (define_insn "<avx512>_fmadd_<mode>_mask
> (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
> "TARGET_AVX512F"
> "vfmadd231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1, %2<round_op5>}"
> - [(set_attr "isa" "fma_avx512f")
> - (set_attr "type" "ssemuladd")
> + [(set_attr "type" "ssemuladd")
> (set_attr "mode" "<MODE>")])
>
> (define_insn "*fma_fmsub_<mode>"
> @@ -3786,8 +3784,7 @@ (define_insn "<avx512>_fmsub_<mode>_mask
> "@
> vfmsub132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3, %2<round_op5>}
> vfmsub213<ssemodesuffix>\t{<round_op5>%3, %2, %0%{%4%}|%0%{%4%}, %2, %3<round_op5>}"
> - [(set_attr "isa" "fma_avx512f,fma_avx512f")
> - (set_attr "type" "ssemuladd")
> + [(set_attr "type" "ssemuladd")
> (set_attr "mode" "<MODE>")])
>
> (define_insn "<avx512>_fmsub_<mode>_mask3<round_name>"
> @@ -3802,8 +3799,7 @@ (define_insn "<avx512>_fmsub_<mode>_mask
> (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
> "TARGET_AVX512F && <round_mode512bit_condition>"
> "vfmsub231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1, %2<round_op5>}"
> - [(set_attr "isa" "fma_avx512f")
> - (set_attr "type" "ssemuladd")
> + [(set_attr "type" "ssemuladd")
> (set_attr "mode" "<MODE>")])
>
> (define_insn "*fma_fnmadd_<mode>"
> @@ -3853,8 +3849,7 @@ (define_insn "<avx512>_fnmadd_<mode>_mas
> "@
> vfnmadd132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3, %2<round_op5>}
> vfnmadd213<ssemodesuffix>\t{<round_op5>%3, %2, %0%{%4%}|%0%{%4%}, %2, %3<round_op5>}"
> - [(set_attr "isa" "fma_avx512f,fma_avx512f")
> - (set_attr "type" "ssemuladd")
> + [(set_attr "type" "ssemuladd")
> (set_attr "mode" "<MODE>")])
>
> (define_insn "<avx512>_fnmadd_<mode>_mask3<round_name>"
> @@ -3869,8 +3864,7 @@ (define_insn "<avx512>_fnmadd_<mode>_mas
> (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
> "TARGET_AVX512F && <round_mode512bit_condition>"
> "vfnmadd231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1, %2<round_op5>}"
> - [(set_attr "isa" "fma_avx512f")
> - (set_attr "type" "ssemuladd")
> + [(set_attr "type" "ssemuladd")
> (set_attr "mode" "<MODE>")])
>
> (define_insn "*fma_fnmsub_<mode>"
> @@ -3923,8 +3917,7 @@ (define_insn "<avx512>_fnmsub_<mode>_mas
> "@
> vfnmsub132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3, %2<round_op5>}
> vfnmsub213<ssemodesuffix>\t{<round_op5>%3, %2, %0%{%4%}|%0%{%4%}, %2, %3<round_op5>}"
> - [(set_attr "isa" "fma_avx512f,fma_avx512f")
> - (set_attr "type" "ssemuladd")
> + [(set_attr "type" "ssemuladd")
> (set_attr "mode" "<MODE>")])
>
> (define_insn "<avx512>_fnmsub_<mode>_mask3<round_name>"
> @@ -3940,8 +3933,7 @@ (define_insn "<avx512>_fnmsub_<mode>_mas
> (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
> "TARGET_AVX512F"
> "vfnmsub231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1, %2<round_op5>}"
> - [(set_attr "isa" "fma_avx512f")
> - (set_attr "type" "ssemuladd")
> + [(set_attr "type" "ssemuladd")
> (set_attr "mode" "<MODE>")])
>
> ;; FMA parallel floating point multiply addsub and subadd operations.
> @@ -4025,8 +4017,7 @@ (define_insn "<avx512>_fmaddsub_<mode>_m
> "@
> vfmaddsub132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3, %2<round_op5>}
> vfmaddsub213<ssemodesuffix>\t{<round_op5>%3, %2, %0%{%4%}|%0%{%4%}, %2, %3<round_op5>}"
> - [(set_attr "isa" "fma_avx512f,fma_avx512f")
> - (set_attr "type" "ssemuladd")
> + [(set_attr "type" "ssemuladd")
> (set_attr "mode" "<MODE>")])
>
> (define_insn "<avx512>_fmaddsub_<mode>_mask3<round_name>"
> @@ -4041,8 +4032,7 @@ (define_insn "<avx512>_fmaddsub_<mode>_m
> (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
> "TARGET_AVX512F"
> "vfmaddsub231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1, %2<round_op5>}"
> - [(set_attr "isa" "fma_avx512f")
> - (set_attr "type" "ssemuladd")
> + [(set_attr "type" "ssemuladd")
> (set_attr "mode" "<MODE>")])
>
> (define_insn "*fma_fmsubadd_<mode>"
> @@ -4095,8 +4085,7 @@ (define_insn "<avx512>_fmsubadd_<mode>_m
> "@
> vfmsubadd132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3, %2<round_op5>}
> vfmsubadd213<ssemodesuffix>\t{<round_op5>%3, %2, %0%{%4%}|%0%{%4%}, %2, %3<round_op5>}"
> - [(set_attr "isa" "fma_avx512f,fma_avx512f")
> - (set_attr "type" "ssemuladd")
> + [(set_attr "type" "ssemuladd")
> (set_attr "mode" "<MODE>")])
>
> (define_insn "<avx512>_fmsubadd_<mode>_mask3<round_name>"
> @@ -4112,8 +4101,7 @@ (define_insn "<avx512>_fmsubadd_<mode>_m
> (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
> "TARGET_AVX512F"
> "vfmsubadd231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1, %2<round_op5>}"
> - [(set_attr "isa" "fma_avx512f")
> - (set_attr "type" "ssemuladd")
> + [(set_attr "type" "ssemuladd")
> (set_attr "mode" "<MODE>")])
>
> ;; FMA3 floating point scalar intrinsics. These merge result with
> @@ -10188,8 +10176,7 @@ (define_insn "*vec_widen_umult_even_v16s
> (const_int 12) (const_int 14)])))))]
> "TARGET_AVX512F && ix86_binary_operator_ok (MULT, V16SImode, operands)"
> "vpmuludq\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
> - [(set_attr "isa" "avx512f")
> - (set_attr "type" "sseimul")
> + [(set_attr "type" "sseimul")
> (set_attr "prefix_extra" "1")
> (set_attr "prefix" "evex")
> (set_attr "mode" "XI")])
> @@ -10305,8 +10292,7 @@ (define_insn "*vec_widen_smult_even_v16s
> (const_int 12) (const_int 14)])))))]
> "TARGET_AVX512F && ix86_binary_operator_ok (MULT, V16SImode, operands)"
> "vpmuldq\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
> - [(set_attr "isa" "avx512f")
> - (set_attr "type" "sseimul")
> + [(set_attr "type" "sseimul")
> (set_attr "prefix_extra" "1")
> (set_attr "prefix" "evex")
> (set_attr "mode" "XI")])
> @@ -19607,8 +19593,7 @@ (define_insn "<mask_codefor>avx512bw_dbp
> UNSPEC_DBPSADBW))]
> "TARGET_AVX512BW"
> "vdbpsadbw\t{%3, %2, %1, %0<mask_operand4>|%0<mask_operand4>, %1, %2, %3}"
> - [(set_attr "isa" "avx")
> - (set_attr "type" "sselog1")
> + [(set_attr "type" "sselog1")
> (set_attr "length_immediate" "1")
> (set_attr "prefix" "evex")
> (set_attr "mode" "<sseinsnmode>")])
>
> Jakub