Kyrill Tkachov wrote:
I like the simplifications in the selection logic here :)
However, changing the value for ARM from 6 to 4 looks a bit arbitrary to me.
There's probably a reason why default values for ARM and Thumb-2 are
different
(maybe not a good one) and I'd rather not change it without some code
size data measurements.
To quote myself from the thread:
Long conditional sequences are slow on modern cores - the value 6 for
max_insns_skipped is a few decades out of date as it was meant for ARM2!
Even with -Os the performance loss for larger values is not worth the
small codesize gain (there are many better options to reduce codesize
that actually improve performance at the same time). So using the same
code generation heuristics for ARM and Thumb-2 is a good idea.
A simple codesize comparison on CSiBE shows using 4 rather than 6 for
max_insns_skipped is just 0.07% larger on ARM with -Os. So it's not
obvious that increasing max_insns_skipped in -Os is a useful codesize
optimization...
So I'd rather not let that hold this cleanup patch though, so this is ok
(assuming a normal bootstrap and testing cycle) without changing the 6
to a 4
and you can propose a change to 4 as a separate patch that can be
discussed on its own.
Based on the above is that really needed? What specific problem do you
expect to occur with the value 4?