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Re: [PATCH, middle-end]: Introduce memory_blockage named insn pattern


On Tue, 5 Sep 2017, Uros Bizjak wrote:
> This patch allows to emit memory_blockage pattern instead of default
> asm volatile as a memory blockage. This patch is needed, so targets
> (e.g. x86) can define and emit more optimal memory blockage pseudo
> insn.

Optimal in what sense?  What pattern do you intend to use on x86, and
would any target be able to use the same?


> And let's call scheduler memory barriers a "memory blockage"
> pseudo insn, not "memory barrier" which should describe real
> instruction.

Note this is not about scheduling, but all RTL passes.  This (pseudo-)
instruction is meant to prevent all memory movement across it, including
RTL CSE, RTL DSE, etc.

Alexander


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