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[GCC][AArch64][PATCH][Committed] Fix failing dbl_mov_immediate_1.c test on big-endian
- From: Tamar Christina <tamar dot christina at arm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: nd at arm dot com, james dot greenhalgh at arm dot com, Richard dot Earnshaw at arm dot com, Marcus dot Shawcroft at arm dot com
- Date: Tue, 1 Aug 2017 12:43:04 +0100
- Subject: [GCC][AArch64][PATCH][Committed] Fix failing dbl_mov_immediate_1.c test on big-endian
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Hi All,
The big-endian tests were failing because it failed to take into account that
in order to generate mov/movk pairs for doubles the bit order are different from
le.
I have updated the tests with conditional results for both endianness.
Committed as r250770.
Regtested on aach64-none-linux-gnu and aarch64_be-none-linux-gnu and no issues.
Thanks,
Tamar
gcc/testsuite
2017-08-01 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/dbl_mov_immediate_1.c:
Use conditional assembler scans.
--
diff --git a/gcc/testsuite/gcc.target/aarch64/dbl_mov_immediate_1.c b/gcc/testsuite/gcc.target/aarch64/dbl_mov_immediate_1.c
index e8dd01db056100f91ae6b933453622e62c23f411..cfe8c9e993e974822fd8a5fbbad4563cf5e9c30a 100644
--- a/gcc/testsuite/gcc.target/aarch64/dbl_mov_immediate_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/dbl_mov_immediate_1.c
@@ -46,8 +46,11 @@ double d4(void)
/* { dg-final { scan-assembler-times "fmov\td\[0-9\]+, 1\\\.5e\\\+0" 1 } } */
-/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, 25838523252736" 1 } } */
-/* { dg-final { scan-assembler-times "movk\tx\[0-9\]+, 0x40fe, lsl 48" 1 } } */
-/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, -9223372036854775808" 1 } } */
+/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, 25838523252736" 1 { target aarch64-*-* } } } */
+/* { dg-final { scan-assembler-times "movk\tx\[0-9\]+, 0x40fe, lsl 48" 1 { target aarch64-*-* } } } */
+/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, -9223372036854775808" 1 { target aarch64-*-* } } } */
+/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, 6016" 1 { target aarch64_be-*-* } } } */
+/* { dg-final { scan-assembler-times "movk\tx\[0-9\]+, 0x40fe, lsl 16" 1 { target aarch64_be-*-* } } } */
+/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, 2147483648" 1 { target aarch64_be-*-* } } } */
/* { dg-final { scan-assembler-times "fmov\td\[0-9\]+, x\[0-9\]+" 2 } } */