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Re: [PATCH][GCC][AArch64] optimize float immediate moves (1 /4) - infrastructure.
- From: "Bin.Cheng" <amker dot cheng at gmail dot com>
- To: Tamar Christina <Tamar dot Christina at arm dot com>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>, nd <nd at arm dot com>, James Greenhalgh <James dot Greenhalgh at arm dot com>, Marcus Shawcroft <Marcus dot Shawcroft at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>
- Date: Tue, 1 Aug 2017 12:16:26 +0100
- Subject: Re: [PATCH][GCC][AArch64] optimize float immediate moves (1 /4) - infrastructure.
- Authentication-results: sourceware.org; auth=none
- References: <VI1PR0801MB203164A5E1F6B6EDA0F2074AFFC80@VI1PR0801MB2031.eurprd08.prod.outlook.com>
On Wed, Jun 7, 2017 at 12:38 PM, Tamar Christina
<Tamar.Christina@arm.com> wrote:
> Hi All,
>
>
> This patch lays the ground work to fix the immediate moves for floats
> to use a combination of mov, movi, fmov instead of ldr and adrp to load
> float constants that fit within the 16-bit limit of movz.
>
> The idea behind it is that these are used quite often in masks etc and we can
> get a gain by doing integer moves instead of memory loads.
>
> This patch also adds the patterns for SImode and DImode to use SIMD mov
> instructions when it's able to.
>
> It's particularly handy when masks are used such as the
> 0x80000000 mask in copysignf.
>
> This now generates
>
> movi v2.2s, 0x80, lsl 24
>
> instead of a literal load.
>
>
> Regression tested on aarch64-none-linux-gnu and no regressions.
Hi,
I saw below failure after svn+ssh://gcc.gnu.org/svn/gcc/trunk@250672
FAIL: gcc.target/aarch64/advsimd-intrinsics/vcvt_high_1.c -O1
(internal compiler error)
Regression in patch updates?
Thanks,
bin
>
> OK for trunk?
>
> Thanks,
> Tamar
>
>
> gcc/
> 2017-06-07 Tamar Christina <tamar.christina@arm.com>
>
> * config/aarch64/aarch64.c
> (aarch64_simd_container_mode): Add prototype.
> (aarch64_expand_mov_immediate): Add HI support.
> (aarch64_reinterpret_float_as_int, aarch64_float_const_rtx_p: New.
> (aarch64_can_const_movi_rtx_p): New.
> (aarch64_preferred_reload_class):
> Remove restrictions of using FP registers for certain SIMD operations.
> (aarch64_rtx_costs): Added new cost for CONST_DOUBLE moves.
> (aarch64_valid_floating_const): Add integer move validation.
> (aarch64_simd_imm_scalar_p): Remove.
> (aarch64_output_scalar_simd_mov_immediate): Generalize function.
> (aarch64_legitimate_constant_p): Expand list of supported cases.
> * config/aarch64/aarch64-protos.h
> (aarch64_float_const_rtx_p, aarch64_can_const_movi_rtx_p): New.
> (aarch64_reinterpret_float_as_int): New.
> (aarch64_simd_imm_scalar_p): Remove.
> * config/aarch64/predicates.md (aarch64_reg_or_fp_float): New.
> * config/aarch64/constraints.md (Uvi): New.
> (Dd): Split into Ds and new Dd.
> * config/aarch64/aarch64.md (*movsi_aarch64):
> Add SIMD mov case.
> (*movdi_aarch64): Add SIMD mov case.