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Re: [PATCH] [AArch64] PR target/71663 Improve Vector Initializtion
- From: James Greenhalgh <james dot greenhalgh at arm dot com>
- To: "Hurugalawadi, Naveen" <Naveen dot Hurugalawadi at cavium dot com>
- Cc: Kyrill Tkachov <kyrylo dot tkachov at foss dot arm dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, "Pinski, Andrew" <Andrew dot Pinski at cavium dot com>, Marcus Shawcroft <marcus dot shawcroft at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>, "nd at arm dot com" <nd at arm dot com>
- Date: Tue, 13 Jun 2017 14:56:02 +0100
- Subject: Re: [PATCH] [AArch64] PR target/71663 Improve Vector Initializtion
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On Tue, Jun 13, 2017 at 10:24:59AM +0000, Hurugalawadi, Naveen wrote:
> Hi James,
>
> Thanks for your review and useful comments.
>
> >> If you could try to keep one reply chain for each patch series
> Will keep that in mind for sure :-)
>
> >> Very minor, but what is wrong with:
> >> int matches[16][2] = {0};
> Done.
>
> >> nummatches is unused.
> Removed.
>
> >> This search algorithm is tough to follow
> Updated as per your comments.
>
> >> Put braces round this and write it as two statements
> Done.
>
> >> Move your new code above the part-variable case.
> Done.
>
> >> c is unused.
> Removed.
>
> Bootstrapped and Regression tested on aarch64-thunder-linux.
>
> Please review the patch and let us know if any comments or suggestions.
Almost OK. Could you make the testcase a bit more comprehensive? Test
that the right thing happens with multiple duplicates, that the right thing
happens when there are no duplicates, etc. At the moment the test does not
provide good coverage of the cases your code handles.
With a fuller testcase this will likely be OK, but please repost the patch
for another review.
Thanks,
James
> diff --git a/gcc/testsuite/gcc.target/aarch64/pr71663.c b/gcc/testsuite/gcc.target/aarch64/pr71663.c
> new file mode 100644
> index 0000000..65f368d
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/pr71663.c
> @@ -0,0 +1,14 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2" } */
> +
> +#define vector __attribute__((vector_size(16)))
> +
> +vector float combine (float a, float b, float d)
> +{
> + return (vector float) { a, b, a, d };
> +}
> +
> +/* { dg-final { scan-assembler-not "movi\t" } } */
> +/* { dg-final { scan-assembler-not "orr\t" } } */
> +/* { dg-final { scan-assembler-times "ins\t" 2 } } */
> +/* { dg-final { scan-assembler-times "dup\t" 1 } } */