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[PATCH, rs6000] Fold vector absolutes in GIMPLE
- From: Will Schmidt <will_schmidt at vnet dot ibm dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>, Segher Boessenkool <segher at kernel dot crashing dot org>, David Edelsohn <dje dot gcc at gmail dot com>
- Cc: Bill Schmidt <wschmidt at linux dot vnet dot ibm dot com>
- Date: Fri, 26 May 2017 12:19:19 -0500
- Subject: [PATCH, rs6000] Fold vector absolutes in GIMPLE
- Authentication-results: sourceware.org; auth=none
- Reply-to: will_schmidt at vnet dot ibm dot com
Hi,
Add support for early expansion of vector absolute built-ins.
Bootstraps currently running (p7,p8le,p8be).
OK for trunk?
Thanks,
-Will
[gcc]
2017-05-26 Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling
for early expansion of vector absolute builtins.
[gcc/testsuite]
2017-05-15 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-abs-char.c: New.
* gcc.target/powerpc/fold-vec-abs-floatdouble.c: New.
* gcc.target/powerpc/fold-vec-abs-int.c: New.
* gcc.target/powerpc/fold-vec-abs-longlong.c: New.
* gcc.target/powerpc/fold-vec-abs-short.c: New.
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index dac673c..104a052 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -17333,6 +17333,21 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
gsi_replace (gsi, g, true);
return true;
}
+ /* flavors of vec_abs. */
+ case ALTIVEC_BUILTIN_ABS_V16QI:
+ case ALTIVEC_BUILTIN_ABS_V8HI:
+ case ALTIVEC_BUILTIN_ABS_V4SI:
+ case ALTIVEC_BUILTIN_ABS_V4SF:
+ case P8V_BUILTIN_ABS_V2DI:
+ case VSX_BUILTIN_XVABSDP:
+ {
+ arg0 = gimple_call_arg (stmt, 0);
+ lhs = gimple_call_lhs (stmt);
+ gimple *g = gimple_build_assign (lhs, ABS_EXPR, arg0);
+ gimple_set_location (g, gimple_location (stmt));
+ gsi_replace (gsi, g, true);
+ return true;
+ }
default:
break;
}
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-char.c
new file mode 100644
index 0000000..239c919
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-char.c
@@ -0,0 +1,18 @@
+/* Verify that overloaded built-ins for vec_abs with char
+ inputs produce the right results. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2" } */
+
+#include <altivec.h>
+
+vector signed char
+test2 (vector signed char x)
+{
+ return vec_abs (x);
+}
+
+/* { dg-final { scan-assembler-times "vspltisw|vxor" 1 } } */
+/* { dg-final { scan-assembler-times "vsububm" 1 } } */
+/* { dg-final { scan-assembler-times "vmaxsb" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-floatdouble.c
new file mode 100644
index 0000000..1a08618
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-floatdouble.c
@@ -0,0 +1,23 @@
+/* Verify that overloaded built-ins for vec_abs with float and
+ double inputs for VSX produce the right results. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2" } */
+
+#include <altivec.h>
+
+vector float
+test1 (vector float x)
+{
+ return vec_abs (x);
+}
+
+vector double
+test2 (vector double x)
+{
+ return vec_abs (x);
+}
+
+/* { dg-final { scan-assembler-times "xvabssp" 1 } } */
+/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-int.c
new file mode 100644
index 0000000..caf8861
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-int.c
@@ -0,0 +1,18 @@
+/* Verify that overloaded built-ins for vec_abs with int
+ inputs produce the right results. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2 " } */
+
+#include <altivec.h>
+
+vector signed int
+test1 (vector signed int x)
+{
+ return vec_abs (x);
+}
+
+/* { dg-final { scan-assembler-times "vspltisw|vxor" 1 } } */
+/* { dg-final { scan-assembler-times "vsubuwm" 1 } } */
+/* { dg-final { scan-assembler-times "vmaxsw" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-longlong.c
new file mode 100644
index 0000000..5b59d19
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-longlong.c
@@ -0,0 +1,18 @@
+/* Verify that overloaded built-ins for vec_abs with long long
+ inputs produce the right results. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mpower8-vector -O2" } */
+
+#include <altivec.h>
+
+vector signed long long
+test3 (vector signed long long x)
+{
+ return vec_abs (x);
+}
+
+/* { dg-final { scan-assembler-times "vspltisw|vxor" 1 } } */
+/* { dg-final { scan-assembler-times "vsubudm" 1 } } */
+/* { dg-final { scan-assembler-times "vmaxsd" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-short.c
new file mode 100644
index 0000000..d312000
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-short.c
@@ -0,0 +1,18 @@
+/* Verify that overloaded built-ins for vec_abs with short
+ inputs produce the right results. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2" } */
+
+#include <altivec.h>
+
+vector signed short
+test3 (vector signed short x)
+{
+ return vec_abs (x);
+}
+
+/* { dg-final { scan-assembler-times "vspltisw|vxor" 1 } } */
+/* { dg-final { scan-assembler-times "vsubuhm" 1 } } */
+/* { dg-final { scan-assembler-times "vmaxsh" 1 } } */