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[PATCH, i386]: Handle ASHIFTRT in STV pass (PR 70799)


Attached fairly rivial patch adds ASHIFTRT handling for
TARGET_AVX512VL targets in STV pass.

The patch also merges a couple of shift vector insn patterns.

2017-04-25  Uros Bizjak  <ubizjak@gmail.com>

    PR target/70799
    * config/i386/i386.c (dimode_scalar_to_vector_candidate_p):
    Handle ASHIFTRT.
    (dimode_scalar_chain::compute_convert_gain): Ditto.
    (dimode_scalar_chain::make_vector_copies): Ditto.
    (dimode_scalar_chain::convert_reg): Ditto.
    (dimode_scalar_chain::convert_insn): Ditto.
    * config/i386/sse.md (VI24_AVX512BW_1): Remove mode iterator.
    (VI248_AVX512BW_1): New mode iterator.
    (<mask_codefor>ashr<mode>3<mask_name>): Merge insn pattern with
    <mask_codefor>ashrv2di3<mask_name> insn using VI248_AVX512BW_1
    mode iterator.

testsuite/ChangeLog:

2017-04-25  Uros Bizjak  <ubizjak@gmail.com>

    PR target/70799
    * gcc.target/i386/pr70799-5.c: New test.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. My
target doesn't test AVX512VL runtime, but considering how trivial the
patch is, I don't expect problems with it. I did test for ICEs,
though.

Committed to mainline SVN.

Uros.

Attachment: p.diff.txt
Description: Text document


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