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Re: [PATCH, GCC/testsuite/ARM, stage4, ping] Compile atomic_loaddi_11 for Cortex-R5
- From: Thomas Preudhomme <thomas dot preudhomme at foss dot arm dot com>
- To: "Richard Earnshaw (lists)" <Richard dot Earnshaw at arm dot com>, Kyrill Tkachov <kyrylo dot tkachov at arm dot com>, Ramana Radhakrishnan <ramana dot radhakrishnan at arm dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Tue, 4 Apr 2017 18:00:04 +0100
- Subject: Re: [PATCH, GCC/testsuite/ARM, stage4, ping] Compile atomic_loaddi_11 for Cortex-R5
- Authentication-results: sourceware.org; auth=none
- References: <bd3d7a12-7778-56fc-9682-be9735efa471@foss.arm.com> <55a17848-dedc-9eec-7258-7e80708b9ed8@arm.com> <4d5a7848-e57d-38fd-5bc3-3c0c7d1c33c6@foss.arm.com> <ba103cf5-bd80-02ce-80c5-9d8d86953a1c@foss.arm.com> <e60322ea-be7a-a714-1c47-a4ebfd53875a@foss.arm.com> <b3a0d9c9-b8b8-280a-a901-8024400f1c58@foss.arm.com> <ca69e972-3155-6f31-a1cb-dec7d7eddbf5@foss.arm.com>
Hi,
gcc.target/arm/atomic_loaddi_11.c testcase contributed in r246365 does
not test the changed code since ARMv7-R does not have division
instructions in ARM state. This patch changes it to target Cortex-R5
processor instead which does have division instructions in ARM state.
ChangeLog entry is as follows:
*** gcc/testsuite/ChangeLog ***
2017-03-22 Thomas Preud'homme <thomas.preudhomme@arm.com
PR target/80082
* gcc.target/arm/atomic_loaddi_11.c: Target Cortex-R5 instead of
ARMv7-R.
Is this ok for stage4?
Best regards,
Thomas
On 30/03/17 11:55, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 23/03/17 17:09, Thomas Preudhomme wrote:
My apologize, this works for both -march of -mcpu not cortex-r4 in RUNTESTFLAGS.
ChangeLog entry is unchanged:
*** gcc/testsuite/ChangeLog ***
2017-03-22 Thomas Preud'homme <thomas.preudhomme@arm.com
PR target/80082
* gcc.target/arm/atomic_loaddi_11.c: Target Cortex-R5 instead of
ARMv7-R.
Best regards,
Thomas
On 23/03/17 16:53, Thomas Preudhomme wrote:
Sorry, I forgot about -march. Hold on.
On 23/03/17 16:51, Thomas Preudhomme wrote:
Please find attached an updated patch. ChangeLog entry unchanged:
*** gcc/testsuite/ChangeLog ***
2017-03-22 Thomas Preud'homme <thomas.preudhomme@arm.com
PR target/80082
* gcc.target/arm/atomic_loaddi_11.c: Target Cortex-R5 instead of
ARMv7-R.
Is this ok for stage4?
Best regards,
Thomas
On 23/03/17 16:19, Thomas Preudhomme wrote:
Mmmh I probably need to add a dg-skip-if in there. Will respin the patch.
Best regards,
Thomas
On 23/03/17 16:10, Richard Earnshaw (lists) wrote:
On 23/03/17 16:02, Thomas Preudhomme wrote:
Hi,
gcc.target/arm/atomic_loaddi_11.c testcase contributed in r246365 does
not test the changed code since ARMv7-R does not have division
instructions in ARM state. This patch changes it to target Cortex-R5
processor instead which does have division instructions in ARM state.
ChangeLog entry is as follows:
*** gcc/testsuite/ChangeLog ***
2017-03-22 Thomas Preud'homme <thomas.preudhomme@arm.com
PR target/80082
* gcc.target/arm/atomic_loaddi_11.c: Target Cortex-R5 instead of
ARMv7-R.
Is this ok for stage4?
Best regards,
Thomas
atomic_loaddi_11_cortexr5.patch
diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c
b/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c
index
275669bd76356dc7c7b6a5373792d9a5089ede51..4ada2efd5f047154f2ca2fb39e9432c96ee1d42b
100644
--- a/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c
+++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c
@@ -1,7 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_arch_v7r_ok } */
-/* { dg-options "-O2" } */
-/* { dg-add-options arm_arch_v7r } */
+/* { dg-options "-O2 -mcpu=cortex-r5" } */
#include <stdatomic.h>
Will that work properly if doing multilib testing with a specific CPU
target?
R.
diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c
index 275669bd76356dc7c7b6a5373792d9a5089ede51..85c64ae68b1b1ee68466809f7f83d07ceabec575 100644
--- a/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c
+++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_arch_v7r_ok } */
-/* { dg-options "-O2" } */
-/* { dg-add-options arm_arch_v7r } */
+/* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" "-march=*" } { "-mcpu=cortex-r5" } } */
+/* { dg-options "-O2 -mcpu=cortex-r5" } */
#include <stdatomic.h>