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[Aarch64] Fix stack checking in ILP32 mode


Hi,

this fixes the ICE that has been introduced by the new implementation of stack 
checking in ILP32 mode, hence a regression present on mainline and 6 branch.
I'd also like to mention that the patch only restores the implementation that 
was originally submitted, i.e. it was probably working out of the box before:
  https://gcc.gnu.org/ml/gcc-patches/2015-12/msg00418.html

Tested on Aarch64/Linux, both LP64 and ILP32, OK for mainline and 6 branch?


2017-04-03  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/78002
	* config/aarch64/aarch64.c (aarch64_emit_probe_stack_range): Replace
	ptr_mode with Pmode throughout.
	 * config/aarch64/aarch64.md (probe_stack_range_<PTR:mode): Rename
	into probe_stack_range and use DImode.

-- 
Eric Botcazou
Index: config/aarch64/aarch64.c
===================================================================
--- config/aarch64/aarch64.c	(revision 246276)
+++ config/aarch64/aarch64.c	(working copy)
@@ -2610,7 +2610,7 @@ aarch64_libgcc_cmp_return_mode (void)
 static void
 aarch64_emit_probe_stack_range (HOST_WIDE_INT first, HOST_WIDE_INT size)
 {
-  rtx reg1 = gen_rtx_REG (ptr_mode, PROBE_STACK_FIRST_REG);
+  rtx reg1 = gen_rtx_REG (Pmode, PROBE_STACK_FIRST_REG);
 
   /* See the same assertion on PROBE_INTERVAL above.  */
   gcc_assert ((first % ARITH_FACTOR) == 0);
@@ -2622,9 +2622,9 @@ aarch64_emit_probe_stack_range (HOST_WID
       const HOST_WIDE_INT base = ROUND_UP (size, ARITH_FACTOR);
 
       emit_set_insn (reg1,
-		     plus_constant (ptr_mode,
+		     plus_constant (Pmode,
 				    stack_pointer_rtx, -(first + base)));
-      emit_stack_probe (plus_constant (ptr_mode, reg1, base - size));
+      emit_stack_probe (plus_constant (Pmode, reg1, base - size));
     }
 
   /* The run-time loop is made up of 8 insns in the generic case while the
@@ -2634,7 +2634,7 @@ aarch64_emit_probe_stack_range (HOST_WID
       HOST_WIDE_INT i, rem;
 
       emit_set_insn (reg1,
-		     plus_constant (ptr_mode,
+		     plus_constant (Pmode,
 				    stack_pointer_rtx,
 				    -(first + PROBE_INTERVAL)));
       emit_stack_probe (reg1);
@@ -2645,7 +2645,7 @@ aarch64_emit_probe_stack_range (HOST_WID
       for (i = 2 * PROBE_INTERVAL; i < size; i += PROBE_INTERVAL)
 	{
 	  emit_set_insn (reg1,
-			 plus_constant (ptr_mode, reg1, -PROBE_INTERVAL));
+			 plus_constant (Pmode, reg1, -PROBE_INTERVAL));
 	  emit_stack_probe (reg1);
 	}
 
@@ -2654,11 +2654,11 @@ aarch64_emit_probe_stack_range (HOST_WID
 	{
 	  const HOST_WIDE_INT base = ROUND_UP (rem, ARITH_FACTOR);
 
-	  emit_set_insn (reg1, plus_constant (ptr_mode, reg1, -base));
-	  emit_stack_probe (plus_constant (ptr_mode, reg1, base - rem));
+	  emit_set_insn (reg1, plus_constant (Pmode, reg1, -base));
+	  emit_stack_probe (plus_constant (Pmode, reg1, base - rem));
 	}
       else
-	emit_stack_probe (plus_constant (ptr_mode, reg1, -rem));
+	emit_stack_probe (plus_constant (Pmode, reg1, -rem));
     }
 
   /* Otherwise, do the same as above, but in a loop.  Note that we must be
@@ -2668,7 +2668,7 @@ aarch64_emit_probe_stack_range (HOST_WID
      equality test for the loop condition.  */
   else
     {
-      rtx reg2 = gen_rtx_REG (ptr_mode, PROBE_STACK_SECOND_REG);
+      rtx reg2 = gen_rtx_REG (Pmode, PROBE_STACK_SECOND_REG);
 
       /* Step 1: round SIZE to the previous multiple of the interval.  */
 
@@ -2679,11 +2679,11 @@ aarch64_emit_probe_stack_range (HOST_WID
 
       /* TEST_ADDR = SP + FIRST.  */
       emit_set_insn (reg1,
-		     plus_constant (ptr_mode, stack_pointer_rtx, -first));
+		     plus_constant (Pmode, stack_pointer_rtx, -first));
 
       /* LAST_ADDR = SP + FIRST + ROUNDED_SIZE.  */
       emit_set_insn (reg2,
-		     plus_constant (ptr_mode, stack_pointer_rtx,
+		     plus_constant (Pmode, stack_pointer_rtx,
 				    -(first + rounded_size)));
 
 
@@ -2699,10 +2699,7 @@ aarch64_emit_probe_stack_range (HOST_WID
 	 probes at FIRST + N * PROBE_INTERVAL for values of N from 1
 	 until it is equal to ROUNDED_SIZE.  */
 
-      if (ptr_mode == DImode)
-	emit_insn (gen_probe_stack_range_di (reg1, reg1, reg2));
-      else
-	emit_insn (gen_probe_stack_range_si (reg1, reg1, reg2));
+      emit_insn (gen_probe_stack_range (reg1, reg1, reg2));
 
 
       /* Step 4: probe at FIRST + SIZE if we cannot assert at compile-time
@@ -2716,11 +2713,11 @@ aarch64_emit_probe_stack_range (HOST_WID
 	    {
 	      const HOST_WIDE_INT base = ROUND_UP (rem, ARITH_FACTOR);
 
-	      emit_set_insn (reg2, plus_constant (ptr_mode, reg2, -base));
-	      emit_stack_probe (plus_constant (ptr_mode, reg2, base - rem));
+	      emit_set_insn (reg2, plus_constant (Pmode, reg2, -base));
+	      emit_stack_probe (plus_constant (Pmode, reg2, base - rem));
 	    }
 	  else
-	    emit_stack_probe (plus_constant (ptr_mode, reg2, -rem));
+	    emit_stack_probe (plus_constant (Pmode, reg2, -rem));
 	}
     }
 
Index: config/aarch64/aarch64.md
===================================================================
--- config/aarch64/aarch64.md	(revision 246276)
+++ config/aarch64/aarch64.md	(working copy)
@@ -5412,11 +5412,11 @@ (define_insn "blockage"
    (set_attr "type" "block")]
 )
 
-(define_insn "probe_stack_range_<PTR:mode>"
-  [(set (match_operand:PTR 0 "register_operand" "=r")
-	(unspec_volatile:PTR [(match_operand:PTR 1 "register_operand" "0")
-			      (match_operand:PTR 2 "register_operand" "r")]
-			       UNSPECV_PROBE_STACK_RANGE))]
+(define_insn "probe_stack_range"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+	(unspec_volatile:DI [(match_operand:DI 1 "register_operand" "0")
+			     (match_operand:DI 2 "register_operand" "r")]
+			      UNSPECV_PROBE_STACK_RANGE))]
   ""
 {
   return aarch64_output_probe_stack_range (operands[0], operands[2]);

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