Re: [PATCH][AArch64][wwwdocs] Summarise some more AArch64 changes for GCC6

[Gerald Pfeifer <gerald at pfeifer dot com>]

On Wed, 27 Apr 2016, Kyrill Tkachov wrote:
> Thanks, I've incorporated your and James' feedback.
> Since James ok'd the content of the patch from an AArch64 perspective
> I'll commit this later today if I receive no further feedback.

Thanks, Kyrill, those were quite some additions!

I made a few follow-up changes to simplify things (and avoided
calling -mcpu=native a new option, since it already exists for
other targets).

Applied.

Gerald

Index: gcc-6/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-6/changes.html,v
retrieving revision 1.97
diff -u -r1.97 changes.html
--- gcc-6/changes.html	11 Mar 2017 22:48:21 -0000	1.97
+++ gcc-6/changes.html	18 Mar 2017 22:36:07 -0000
@@ -392,11 +392,11 @@
    <ul>
      <li>
        A number of AArch64-specific options have been added.  The most
-       important ones are summarised in this section but for usage
-       instructions please refer to the documentation.
+       important ones are summarised in this section; for more detailed
+       information please refer to the documentation.
      </li>
      <li>
-       The new command-line options <code>-march=native</code>,
+       The command-line options <code>-march=native</code>,
        <code>-mcpu=native</code> and <code>-mtune=native</code> are now
        available on native AArch64 GNU/Linux systems.  Specifying
        these options causes GCC to auto-detect the host CPU and
@@ -470,14 +470,14 @@
      </li>
      <li>
        Improvements in the generation of conditional branches and literal
-       pools were made to allow the compiler to compile functions of a large
+       pools allow the compiler to compile functions of a large
        size.  Constant pools are now placed into separate rodata sections.
-       The new option <code>-mpc-relative-literal-loads</code> is
-       introduced to generate per-function literal pools, limiting the maximum
+       The new option <code>-mpc-relative-literal-loads</code>
+       generates per-function literal pools, limiting the maximum
        size of functions to 1MiB.
      </li>
      <li>
-       Several correctness issues with generation of Advanced SIMD instructions
+       Several correctness issues generating Advanced SIMD instructions
        for big-endian targets have been fixed resulting in improved code
        generation for ACLE intrinsics with <code>-mbig-endian</code>.
      </li>