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Re: [PATCH][AArch64] PR rtl-optimization/68664 Implement TARGET_SCHED_CAN_SPECULATE_INSN hook


On 14/02/17 10:08, Kyrill Tkachov wrote:
> Hi all,
> 
> Following up from Segher's patch here is the aarch64 implementation of
> the new hook.
> It forbids speculation of the integer and floating-point division
> instructions as well as the
> square-root instructions.
> 
> With this patch the fsqrt is not speculated and the preformance on the
> code in the PR is improved 3x
> on a Cortex-A53.
> 
> Bootstrapped and tested on aarch64-none-linux-gnu.
> 
> Ok for trunk?
> 
> Thanks,
> Kyrill
> 
> 2016-02-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
> 
>     PR rtl-optimization/68664
>     * config/aarch64/aarch64.c (aarch64_sched_can_speculate_insn):
>     New function.
>     (TARGET_SCHED_CAN_SPECULATE_INSN): Define.
> 
> aarch64-spec.patch

OK.

R.

> 
> 
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index eab719d076358f01023cf8b2a37d3c8edd8d8f1f..f72e4c4423d28af66f3bd8068eeb83060d541839 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -14750,6 +14750,35 @@ aarch64_excess_precision (enum excess_precision_type type)
>    return FLT_EVAL_METHOD_UNPREDICTABLE;
>  }
>  
> +/* Implement TARGET_SCHED_CAN_SPECULATE_INSN.  Return true if INSN can be
> +   scheduled for speculative execution.  Reject the long-running division
> +   and square-root instructions.  */
> +
> +static bool
> +aarch64_sched_can_speculate_insn (rtx_insn *insn)
> +{
> +  switch (get_attr_type (insn))
> +    {
> +      case TYPE_SDIV:
> +      case TYPE_UDIV:
> +      case TYPE_FDIVS:
> +      case TYPE_FDIVD:
> +      case TYPE_FSQRTS:
> +      case TYPE_FSQRTD:
> +      case TYPE_NEON_FP_SQRT_S:
> +      case TYPE_NEON_FP_SQRT_D:
> +      case TYPE_NEON_FP_SQRT_S_Q:
> +      case TYPE_NEON_FP_SQRT_D_Q:
> +      case TYPE_NEON_FP_DIV_S:
> +      case TYPE_NEON_FP_DIV_D:
> +      case TYPE_NEON_FP_DIV_S_Q:
> +      case TYPE_NEON_FP_DIV_D_Q:
> +	return false;
> +      default:
> +	return true;
> +    }
> +}
> +
>  /* Target-specific selftests.  */
>  
>  #if CHECKING_P
> @@ -15138,6 +15167,9 @@ aarch64_libgcc_floating_mode_supported_p
>  #define TARGET_USE_BY_PIECES_INFRASTRUCTURE_P \
>    aarch64_use_by_pieces_infrastructure_p
>  
> +#undef TARGET_SCHED_CAN_SPECULATE_INSN
> +#define TARGET_SCHED_CAN_SPECULATE_INSN aarch64_sched_can_speculate_insn
> +
>  #undef TARGET_CAN_USE_DOLOOP_P
>  #define TARGET_CAN_USE_DOLOOP_P can_use_doloop_if_innermost
>  
> 


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