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[PATCH] Fix PR79256


The following fixes PR79256 in a way suitable for stage4.  But the
underlying issue is that our IL advertises bogus alignment for
types like double on i?86 as their alignment inside structures
is 4 bytes, not 8, and double_type_node advertises 64bit alignment.
UBSAN folks invented the min_align_of_type "hack", quite expensive
one, it builds a FIELD_DECL for just frvs target hook (which also
looks really broken), others would be happy with just the type of the 
decl.

So after this fix both RTL expansion and get_object_alignment still
compute bogus alignment for *(double *)p accesses.  We could fix
up get_object_alignment as well (but given min_align_of_type cost
I'd rather not do that w/o lowering the cost by changning the hook).
And we can fix this properly by fixing the target(s) to not claim
excessive alignment of such modes.  Patches attached below
(the x86 fix bootstrapped fine on x86_64, testing is in progress,
I expect code quality fallout and eventually ABI breakage of course).

Bootstrapped on x86_64-unknown-linux-gnu, testing in progress.

Note RTL expansion is broken since forever checked 3.4.[06] (x86_64
is new in that release).

I do think the proper fix is in the targets.  double_type_node
may not advertise 64bit alignment.

Richard.

2017-01-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/79256
	* targhooks.c (default_builtin_vector_alignment_reachable): Honor
	BIGGEST_FIELD_ALIGNMENT and ADJUST_FIELD_ALIGN to fix up bogus
	alignment on TYPE.
	* tree.c (build_aligned_type): Set TYPE_USER_ALIGN.

Index: gcc/targhooks.c
===================================================================
--- gcc/targhooks.c	(revision 244974)
+++ gcc/targhooks.c	(working copy)
@@ -1130,9 +1130,14 @@ default_vector_alignment (const_tree typ
 /* By default assume vectors of element TYPE require a multiple of the natural
    alignment of TYPE.  TYPE is naturally aligned if IS_PACKED is false.  */
 bool
-default_builtin_vector_alignment_reachable (const_tree /*type*/, bool is_packed)
+default_builtin_vector_alignment_reachable (const_tree type, bool is_packed)
 {
-  return ! is_packed;
+  if (is_packed)
+    return false;
+
+  /* If TYPE can be differently aligned in field context we have to punt
+     as TYPE may have wrong TYPE_ALIGN here (PR79278).  */
+  return min_align_of_type (CONST_CAST_TREE (type)) == TYPE_ALIGN_UNIT (type);
 }
 
 /* By default, assume that a target supports any factor of misalignment
Index: gcc/tree.c
===================================================================
--- gcc/tree.c	(revision 244974)
+++ gcc/tree.c	(working copy)
@@ -6684,6 +6684,7 @@ build_aligned_type (tree type, unsigned
 
   t = build_variant_type_copy (type);
   SET_TYPE_ALIGN (t, align);
+  TYPE_USER_ALIGN (t) = 1;
 
   return t;
 }


2017-01-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/79256
	PR middle-end/79278
	* builtins.c (get_object_alignment_2): Use min_align_of_type
	to extract alignment for MEM_REFs to honor BIGGEST_FIELD_ALIGNMENT
	and ADJUST_FIELD_ALIGN.

Index: gcc/builtins.c
===================================================================
--- gcc/builtins.c	(revision 244974)
+++ gcc/builtins.c	(working copy)
@@ -334,9 +334,11 @@ get_object_alignment_2 (tree exp, unsign
 	 Do so only if get_pointer_alignment_1 did not reveal absolute
 	 alignment knowledge and if using that alignment would
 	 improve the situation.  */
+      unsigned int talign;
       if (!addr_p && !known_alignment
-	  && TYPE_ALIGN (TREE_TYPE (exp)) > align)
-	align = TYPE_ALIGN (TREE_TYPE (exp));
+	  && (talign = min_align_of_type (TREE_TYPE (exp)) * BITS_PER_UNIT)
+	  && talign > align)
+	align = talign;
       else
 	{
 	  /* Else adjust bitpos accordingly.  */


2017-01-30  Richard Biener  <rguenther@suse.de>

	PR target/79277
	* config/i386/i386-modes.def: Align DFmode properly.

Index: gcc/config/i386/i386-modes.def
===================================================================
--- gcc/config/i386/i386-modes.def	(revision 245021)
+++ gcc/config/i386/i386-modes.def	(working copy)
@@ -33,6 +33,7 @@ ADJUST_FLOAT_FORMAT (XF, (TARGET_128BIT_
 			  : &ieee_extended_intel_96_format));
 ADJUST_BYTESIZE  (XF, TARGET_128BIT_LONG_DOUBLE ? 16 : 12);
 ADJUST_ALIGNMENT (XF, TARGET_128BIT_LONG_DOUBLE ? 16 : 4);
+ADJUST_ALIGNMENT (DF, !TARGET_64BIT ? 4 : 8);
 
 /* Add any extra modes needed to represent the condition code.
 


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