Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md	(revision 243196)
+++ config/i386/i386.md	(working copy)
@@ -8534,15 +8534,24 @@
   operands[2] = gen_lowpart (QImode, operands[2]);
 })
 
-(define_insn_and_split "*andndi3_doubleword"
-  [(set (match_operand:DI 0 "register_operand" "=r")
+(define_insn "*andndi3_doubleword"
+  [(set (match_operand:DI 0 "register_operand" "=r,&r")
 	(and:DI
-	  (not:DI (match_operand:DI 1 "register_operand" "r"))
-	  (match_operand:DI 2 "nonimmediate_operand" "rm")))
+	  (not:DI (match_operand:DI 1 "register_operand" "r,0"))
+	  (match_operand:DI 2 "nonimmediate_operand" "rm,rm")))
    (clobber (reg:CC FLAGS_REG))]
-  "TARGET_BMI && !TARGET_64BIT && TARGET_STV && TARGET_SSE2"
+  "!TARGET_64BIT && TARGET_STV && TARGET_SSE2"
   "#"
-  "&& reload_completed"
+  [(set_attr "isa" "bmi,*")])
+
+(define_split
+  [(set (match_operand:DI 0 "register_operand")
+	(and:DI
+	  (not:DI (match_operand:DI 1 "register_operand"))
+	  (match_operand:DI 2 "nonimmediate_operand")))
+   (clobber (reg:CC FLAGS_REG))]
+  "!TARGET_64BIT && TARGET_BMI && TARGET_STV && TARGET_SSE2
+   && reload_completed"
   [(parallel [(set (match_dup 0)
 		   (and:SI (not:SI (match_dup 1)) (match_dup 2)))
 	      (clobber (reg:CC FLAGS_REG))])
@@ -8551,6 +8560,24 @@
 	      (clobber (reg:CC FLAGS_REG))])]
   "split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);")
 
+(define_split
+  [(set (match_operand:DI 0 "register_operand")
+	(and:DI
+	  (not:DI (match_dup 0))
+	  (match_operand:DI 1 "nonimmediate_operand")))
+   (clobber (reg:CC FLAGS_REG))]
+  "!TARGET_64BIT && !TARGET_BMI && TARGET_STV && TARGET_SSE2
+   && reload_completed"
+  [(set (match_dup 0) (not:SI (match_dup 0)))
+   (parallel [(set (match_dup 0)
+		   (and:SI (match_dup 0) (match_dup 1)))
+	      (clobber (reg:CC FLAGS_REG))])
+   (set (match_dup 2) (not:SI (match_dup 2)))
+   (parallel [(set (match_dup 2)
+		   (and:SI (match_dup 2) (match_dup 3)))
+	      (clobber (reg:CC FLAGS_REG))])]
+  "split_double_mode (DImode, &operands[0], 2, &operands[0], &operands[2]);")
+
 (define_insn "*andn<mode>_1"
   [(set (match_operand:SWI48 0 "register_operand" "=r,r")
 	(and:SWI48
Index: testsuite/gcc.target/i386/pr70322-2.c
===================================================================
--- testsuite/gcc.target/i386/pr70322-2.c	(revision 243196)
+++ testsuite/gcc.target/i386/pr70322-2.c	(working copy)
@@ -1,7 +1,7 @@
 /* PR target/70322 */
 /* { dg-do compile { target ia32 } } */
 /* { dg-options "-O2 -msse2 -mstv -mno-bmi" } */
-/* { dg-final { scan-assembler "pandn" { xfail *-*-* } } } */
+/* { dg-final { scan-assembler "pandn" } } */
 
 extern long long z;