This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.
Index Nav: | [Date Index] [Subject Index] [Author Index] [Thread Index] | |
---|---|---|
Message Nav: | [Date Prev] [Date Next] | [Thread Prev] [Thread Next] |
Other format: | [Raw text] |
On Fri, Dec 23, 2016 at 04:34:10PM -0600, Segher Boessenkool wrote: > On Fri, Dec 23, 2016 at 04:47:22PM -0500, Michael Meissner wrote: > > I had two thinkos in my previous patches for ISA 3.0 (power9) support that both > > relate to word extraction and insertion. > > > > The first thinko was that I thought the index for the first byte in the 4 bytes > > to be extracted should be 0..11, when it should be 0..12. If it isn't allowed > > to be 12, you cannot extract the 32-bit word at the bottom of the vector > > register. > > > > The second thinko is where I was doing zeo extending of a 32-bit value within > > a vector register, I used xxextractuw with a byte offset of 1 instead of 4. > > > > I have done the usual bootstrap and make check with no regressions on these > > patches. Can I install them into the trunk? > > Yes please. It sounds like we need a few more testcases though? Actually, since the test case was written at the time I made the thinko, the original test case tested if 12 was illegal instead of 13. I have adjusted the test case. I also forgot to adjust the check in rs6000.c for the bounds being 0..12 instead of 0..11. I fixed that as well. This is the patch that was checked in: [gcc] 2016-12-27 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/predicates.md (const_0_to_12_operand): Rename predicate and change test from 0..11 to 0..12 to match the semantics of the word extract/insert instructions. Change all callers. (const_0_to_11_operand): Likewise. * config/rs6000/rs6000.c (altivec_expand_builtin): Likewise. * config/rs6000/vsx.md (vextract4b): Likewise. (vextract4b_internal): Likewise. (vinsert4b): Likewise. (vinsert4b_internal): Likewise. (vinsert4b_di): Likewise. (vinsert4b_di_internal): Likewise. * config/rs6000/rs6000.md (zero_extendsi<mode>2): Fix offset used in xxextractuw to zero extend the word in the vector registers. (lfiwzx): Likewise. [gcc/testsuite] 2016-12-27 Michael Meissner <meissner@linux.vnet.ibm.com> * gcc.target/powerpc/p9-vinsert4b-2.c: Update test to test for 13 being out of bounds instead of 12. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Attachment:
gcc-stage7.patch044b
Description: Text document
Index Nav: | [Date Index] [Subject Index] [Author Index] [Thread Index] | |
---|---|---|
Message Nav: | [Date Prev] [Date Next] | [Thread Prev] [Thread Next] |