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Re: [PATCHv3] [AARCH64] Add variant support to -m="native"and add thunderxt88p1.
- From: James Greenhalgh <james dot greenhalgh at arm dot com>
- To: Andrew Pinski <pinskia at gmail dot com>
- Cc: Andrew Pinski <apinski at cavium dot com>, Joel Jones <Joel dot Jones at caviumnetworks dot com>, GCC Patches <gcc-patches at gcc dot gnu dot org>, <nd at arm dot com>
- Date: Wed, 14 Dec 2016 17:04:35 +0000
- Subject: Re: [PATCHv3] [AARCH64] Add variant support to -m="native"and add thunderxt88p1.
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On Sat, Nov 26, 2016 at 01:54:34PM -0800, Andrew Pinski wrote:
> On Tue, Nov 1, 2016 at 11:08 AM, Andrew Pinski <pinskia@gmail.com> wrote:
> > On Tue, Nov 17, 2015 at 2:10 PM, Andrew Pinski <apinski@cavium.com> wrote:
> >> Since ThunderX T88 pass 1 (variant 0) is a ARMv8 part while pass 2 (variant 1)
> >> is an ARMv8.1 part, I needed to add detecting of the variant also for this
> >> difference. Also I simplify a little bit and combined the single core and
> >> arch detecting cases so it would be easier to add variant.
> >
> > Actually it is a bit more complex than what I said here, see below for
> > the full table of options and what are enabled/disabled now.
> >
> >> OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions.
> >> Tested -mcpu=native on both T88 pass 1 and T88 pass 2 to make sure it is
> >> deecting the two seperately.
> >
> >
> > Here is the final patch in this series updated; I changed the cpu name
> > slightly and made sure I updated invoke.texi too.
> >
> > The names are going to match the names in LLVM (worked with our LLVM
> > engineer here at Cavium about the names).
> > Here are the names recorded and
> > -mpcu=thunderx:
> > * Matches part num 0xA0 (reserved for ThunderX 8x series)
> > * T88 Pass 2 scheduling
> > * Hardware prefetching (software prefetching disabled)
> > * LSE enabled
> > * no v8.1
> >
> > -mcpu=thunderxt88:
> > * Matches part num 0xA1
> > * T88 Pass 2 scheduling
> > * software prefetching enabled
> > * LSE enabled
> > * no v8.1
> >
> > -mcpu=thunderxt88p1 (only for GCC):
> > * Matches part num 0xA1, variant 0
> > * T88 Pass 1 scheduling
> > * software prefetching enabled
> > * no LSE enabled
> > * no v8.1
> >
> > -mcpu=thunderxt81 and -mcpu=thunderxt83:
> > * Matches part num 0xA2/0xA3
> > * T88 Pass 2 scheduling
> > * Hardware prefetching (software prefetching disabled)
> > * LSE enabled
> > * v8.1
> >
> >
> > I have not hooked up software vs hardware prefetching and the
> > scheduler parts (the next patch will do part of that); both ARMv8.1-a
> > and LSE parts are hooked up as those parts are only in
> > aarch64-cores.def.
> >
> > OK? Bootstrapped and tested on ThunderX T88 and ThunderX T81
> > (aarch64-linux-gnu).
>
> Here is the latest version of the patch. Updated for the latest
> additions of "falkor". Also added a comment about the order of
> "thunderxt88p1" and "thunderxt88".
>
> OK? Bootstrapped and tested on arrch64-linux-gnu with no regressions.
OK. But you typoed "variant" in the new comment.
> +/* Do not swap around "thunderxt88p1" and "thunderxt88", this order is required to handle varient correctly. */
Thanks,
James