This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [PATCH 2/2][AArch64] Add bfx attribute
- From: "Richard Earnshaw (lists)" <Richard dot Earnshaw at arm dot com>
- To: Wilco Dijkstra <Wilco dot Dijkstra at arm dot com>, GCC Patches <gcc-patches at gcc dot gnu dot org>
- Cc: nd <nd at arm dot com>, "philipp dot tomsich at theobroma-systems dot com" <philipp dot tomsich at theobroma-systems dot com>
- Date: Fri, 11 Nov 2016 10:20:44 +0000
- Subject: Re: [PATCH 2/2][AArch64] Add bfx attribute
- Authentication-results: sourceware.org; auth=none
- References: <AM5PR0802MB26102619843F76500A421C7083B80@AM5PR0802MB2610.eurprd08.prod.outlook.com>
On 10/11/16 17:14, Wilco Dijkstra wrote:
> The second patch updates the Cortex-A57 scheduler now that we can differentiate
> between shifts and bitfield inserts. The Cortex-A57 Software Optimization Guide
> indicates that BFM operations use the integer multi-cycle pipeline, while ARM
> UXTB/H instructions use the Integer 1 or Integer 0 pipelines, so swap the bfm
> and extend reservations. This results in minor scheduling differences.
>
> I think the XGene-1 scheduler might need a similar change as currently all AArch64
> shifts are modelled as 2-cycle operations.
>
> ChangeLog:
> 2016-11-10 Wilco Dijkstra <wdijkstr@arm.com>
>
> * config/arm/cortex-a57.md (cortex_a57_alu): Move extend here, move bfm...
> (cortex_a57_alu_shift): ...here.
>
OK.
R.