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Re: [rs6000] Add support for signed overflow arithmetic
- From: Eric Botcazou <ebotcazou at adacore dot com>
- To: Segher Boessenkool <segher at kernel dot crashing dot org>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Tue, 25 Oct 2016 12:09:20 +0200
- Subject: Re: [rs6000] Add support for signed overflow arithmetic
- Authentication-results: sourceware.org; auth=none
- References: <9218493.4xTCRBTuI6@polaris> <2870901.u7X5RjKSyh@polaris> <20161024213052.GA4613@gate.crashing.org>
> It is nicely generic as well, but requires more insns than this if your
> ISA does not have a full complement of logical ops. Well, just an
> "andnot" is enough, you don't actually need eqv here.
Indeed, and it's rather spectacular for 64-bit operations on 32-bit machines
because the sign bit trick can be done solely on the upper word, whereas a
fully-fledged store-flag sequence is heavyweight in this case. Here's what
the patched generic code yields at -O2:
op__add32:
add 10,3,4
xor 9,10,4
eqv 4,3,4
and. 8,9,4
blt- <overflow>
mr 3,10
blr
op__add64:
addc 4,4,6
adde 10,3,5
xor 9,10,5
eqv 5,3,5
and. 8,9,5
blt- <overflow>
mr 3,10
blr
This should help 32-bit x86 too, which doesn't have 64-bit operations AFAICS.
Thanks for the tip, I'll submit the change to the generic code separately.
--
Eric Botcazou