Re: [ARM][PATCH] Add support for overflow add, sub, and neg operations

[Christophe Lyon <christophe dot lyon at linaro dot org>]

On 4 August 2016 at 00:33, Michael Collison <Michael.Collison@arm.com> wrote:
> Hi Christophe,
>
>
> I validated using qemu as well. the results are listed here:
>
>
> http://people.linaro.org/~christophe.lyon/cross-validation/gcc-test-patches/237091-bugzilla-69663-v27/report-build-info.html
>
>
> I'm going to investigate and see if I can determine what the discrepancy is.
>

Hi Michael,

This validation was against trunk @r237091, I used r239008 as reference.
It's possible that your patch conflicts with changes committed to trunk
since your validation.

Christophe

> ________________________________
> From: Christophe Lyon <christophe.lyon@linaro.org>
> Sent: Wednesday, August 3, 2016 5:59:48 AM
> To: Michael Collison
> Cc: gcc-patches@gcc.gnu.org; James Greenhalgh; Kyrylo Tkachov; nd
> Subject: Re: [ARM][PATCH] Add support for overflow add, sub, and neg
> operations
>
> On 2 August 2016 at 10:13, Michael Collison <Michael.Collison@arm.com>
> wrote:
>> Hi,
>>
>> This patch improves code generations for builtin arithmetic overflow
>> operations for the arm backend. As an example for a simple test case such
>> as:
>>
>> int
>> fn3 (int x, int y, int *ovf)
>> {
>>   int res;
>>   *ovf = __builtin_sadd_overflow (x, y, &res);
>>   return res;
>> }
>>
>> Current trunk at -O2 generates
>>
>> fn3:
>>         @ args = 0, pretend = 0, frame = 0
>>         @ frame_needed = 0, uses_anonymous_args = 0
>>         @ link register save eliminated.
>>         cmp     r1, #0
>>         mov     r3, #0
>>         add     r1, r0, r1
>>         blt     .L4
>>         cmp     r1, r0
>>         blt     .L3
>> .L2:
>>         str     r3, [r2]
>>         mov     r0, r1
>>         bx      lr
>> .L4:
>>         cmp     r1, r0
>>         ble     .L2
>> .L3:
>>         mov     r3, #1
>>         b       .L2
>>
>> With the patch this now generates:
>>
>>        adds    r0, r0, r1
>>        movvs   r3, #1
>>        movvc   r3, #0
>>        str     r3, [r2]
>>        bx      lr
>>
>> Ok for trunk?
>>
>
> Hi Michael,
>
> I've run validations with your patch, and I am seeing several failures
> during tests execution:
> http://people.linaro.org/~christophe.lyon/cross-validation/gcc-test-patches/239008-bugzilla-69663-upstream-final/report-build-info.html
>
> I'm using qemu 2.6.0.
>
> Did you run validation on actual HW? It could be a qemu bug, but I
> haven't tried to manually reproduce the problem yet.
>
> Christophe.
>
>
>> 2016-07-27  Michael Collison <michael.collison@linaro.org>
>>          Michael Collison <michael.collison@arm.com>
>>
>>      * config/arm/arm-modes.def: Add new condition code mode CC_V
>>      to represent the overflow bit.
>>      * config/arm/arm.c (maybe_get_arm_condition_code):
>>      Add support for CC_Vmode.
>>      (arm_gen_unlikely_cbranch): New function to generate common
>>      rtl conditional branches for overflow patterns.
>>      * config/arm/arm-protos.h: Add prototype for
>>      arm_gen_unlikely_cbranch.
>>      * config/arm/arm.md (addv<mode>4, add<mode>3_compareV,
>>      addsi3_compareV_upper): New patterns to support signed
>>      builtin overflow add operations.
>>      (uaddv<mode>4, add<mode>3_compareC, addsi3_compareV_upper):
>>      New patterns to support unsigned builtin add overflow operations.
>>      (subv<mode>4, sub<mode>3_compare1): New patterns to support signed
>>      builtin overflow subtract operations,
>>      (usubv<mode>4): New patterns to support unsigned builtin subtract
>>      overflow operations.
>>      (negvsi3, negvdi3, negdi2_compare, negsi2_carryin_compare): New
>> patterns
>>      to support builtin overflow negate operations.
>>      * gcc.target/arm/builtin_saddl.c: New testcase.
>>      * gcc.target/arm/builtin_saddll.c: New testcase.
>>      * gcc.target/arm/builtin_uaddl.c: New testcase.
>>      * gcc.target/arm/builtin_uaddll.c: New testcase.
>>      * gcc.target/arm/builtin_ssubl.c: New testcase.
>>      * gcc.target/arm/builtin_ssubll.c: New testcase.
>>      * gcc.target/arm/builtin_usubl.c: New testcase.
>>      * gcc.target/arm/builtin_usubll.c: New testcase.
>