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Re: [patch,avr] More insns to handle (inverted) bit-bit moves


2016-07-20 15:59 GMT+03:00 Georg-Johann Lay <avr@gjlay.de>:
> This adds some insns that set a destination bit expressed as zero_extract to
> a source bit expressed as extract, right shift, and simple combinations
> thereof.
>
> Purpose is smaller code and to avoid costly extracts or shifts.  This
> applies mostly to bitfields; for open-coded bit insertions the patterns that
> I'm seeing are sometimes too complicated, i.e. IOR of AND and SHIFTRT and
> XOR and SUBREGs and all sorts of arithmetic that are not canonicalized in
> any way by the middle end (insn combiner, if conversion, ...)
>
> Ok for trunk?
>

Ok.
Please commit.

> Johann
>
>         * config/avr/avr.md (any_extract, any_shiftrt): New code iterators.
>         (*insv.extract, *insv.shiftrt, *insv.not-bit.0, *insv.not-bit.7)
>         (*insv.xor-extract, *insv.xor1-bit.0): New insns.
>         (adjust_len) [insv_notbit, insv_notbit_0, insv_notbit_7]: New
>         values for insn attribute.
>         * config/avr/avr.c (avr_out_insert_notbit): New function.
>         (avr_adjust_insn_length): Handle ADJUST_LEN_INSV_NOTBIT,
>         ADJUST_LEN_INSV_NOTBIT_0/_7.
>         * config/avr/avr-protos.h (avr_out_insert_notbit): New proto.
>


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