[AArch64][11/14] ARMv8.2-A FP16 testsuite selector

[Jiong Wang <jiong dot wang at foss dot arm dot com>]

ARMv8.2-A adds support for scalar and vector FP16 instructions to ARM and
AArch64. This patch adds support for testing code for AArch64 targets
using the new instructions. It is based on the target-support code for
ARMv8.2-A added for ARM (AArch32).

The patch
- Updates effective-target directives arm_v8_2a_fp16_scalar_ok,
  arm_v8_2a_fp16_scalar_hw, arm_v8_2a_fp16_neon_ok and
  arm_v8_2a_fp16_neon_hw to check for target and hardware support of
  FP16 instructions on AArch64.

gcc/testsuite/
2016-07-07  Matthew Wahab <matthew.wahab@arm.com>
            Jiong Wang <jiong.wang@arm.com>

        * target-supports.exp (add_options_for_arm_v8_2a_fp16_scalar):
        Mention AArch64 support.
        (add_options_for_arm_v8_2a_fp16_neon): Likewise.
        (check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache): Support
        AArch64 targets.
        (check_effective_target_arm_v8_2a_fp16_neon_ok_nocache): Support
        AArch64 targets.
        (check_effective_target_arm_v8_2a_fp16_scalar_hw): Support AArch64
        targets.
        (check_effective_target_arm_v8_2a_fp16_neon_hw): Likewise.

>From be7793ef912b7aac0e548f528e54aaf5ddd40a4e Mon Sep 17 00:00:00 2001
From: Jiong Wang <jiong.wang@arm.com>
Date: Wed, 6 Jul 2016 14:43:31 +0100
Subject: [PATCH 11/14] [11/14] TESTSUITE selector for ARMv8.2-A FP16 extension

---
 gcc/testsuite/lib/target-supports.exp | 50 ++++++++++++++++++++++++++---------
 1 file changed, 38 insertions(+), 12 deletions(-)

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index a13e852..812e85a 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2905,7 +2905,7 @@ proc add_options_for_arm_v8_1a_neon { flags } {
 }
 
 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
-# Also adds the ARMv8 FP options for ARM.
+# Also adds the ARMv8 FP options for ARM and for AArch64.
 
 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
     if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
@@ -2916,7 +2916,7 @@ proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
 }
 
 # Add the options needed for ARMv8.2 with the FP16 extension.  Also adds
-# the ARMv8 NEON options for ARM.
+# the ARMv8 NEON options for ARM and for AArch64.
 
 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
     if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
@@ -3487,14 +3487,14 @@ proc check_effective_target_arm_v8_1a_neon_ok { } {
 }
 
 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
-# instructions, 0 otherwise.  The test is valid for ARM.  Record the
-# command line options needed.
+# instructions, 0 otherwise.  The test is valid for ARM and for AArch64.
+# Record the command line options needed.
 
 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
     global et_arm_v8_2a_fp16_scalar_flags
     set et_arm_v8_2a_fp16_scalar_flags ""
 
-    if { ![istarget arm*-*-*] } {
+    if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
 	return 0;
     }
 
@@ -3522,14 +3522,14 @@ proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
 }
 
 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
-# instructions, 0 otherwise.  The test is valid for ARM.  Record the
-# command line options needed.
+# instructions, 0 otherwise.  The test is valid for ARM and for AArch64.
+# Record the command line options needed.
 
 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
     global et_arm_v8_2a_fp16_neon_flags
     set et_arm_v8_2a_fp16_neon_flags ""
 
-    if { ![istarget arm*-*-*] } {
+    if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
 	return 0;
     }
 
@@ -3613,7 +3613,8 @@ proc check_effective_target_arm_v8_1a_neon_hw { } {
 }
 
 # Return 1 if the target supports executing floating point instructions from
-# ARMv8.2 with the FP16 extension, 0 otherwise.  The test is valid for ARM.
+# ARMv8.2 with the FP16 extension, 0 otherwise.  The test is valid for ARM and
+# for AArch64.
 
 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
     if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
@@ -3626,19 +3627,30 @@ proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
 	  __fp16 a = 1.0;
 	  __fp16 result;
 
+	  #ifdef __ARM_ARCH_ISA_A64
+
+	  asm ("fabs %h0, %h1"
+	       : "=w"(result)
+	       : "w"(a)
+	       : /* No clobbers.  */);
+
+	  #else
+
 	  asm ("vabs.f16 %0, %1"
 	       : "=w"(result)
 	       : "w"(a)
 	       : /* No clobbers.  */);
 
+	  #endif
+
 	  return (result == 1.0) ? 0 : 1;
 	}
     } [add_options_for_arm_v8_2a_fp16_scalar ""]]
 }
 
-# Return 1 if the target supports executing instructions Adv.SIMD
-# instructions from ARMv8.2 with the FP16 extension, 0 otherwise.  The
-# test is valid for ARM.
+# Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
+# with the FP16 extension, 0 otherwise.  The test is valid for ARM and for
+# AArch64.
 
 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
     if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
@@ -3648,6 +3660,18 @@ proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
 	int
 	main (void)
 	{
+	  #ifdef __ARM_ARCH_ISA_A64
+
+	  __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
+	  __Float16x4_t result;
+
+	  asm ("fabs %0.4h, %1.4h"
+	       : "=w"(result)
+	       : "w"(a)
+	       : /* No clobbers.  */);
+
+	  #else
+
 	  __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
 	  __simd64_float16_t result;
 
@@ -3656,6 +3680,8 @@ proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
 	       : "w"(a)
 	       : /* No clobbers.  */);
 
+	  #endif
+
 	  return (result[0] == 1.0) ? 0 : 1;
 	}
     } [add_options_for_arm_v8_2a_fp16_neon ""]]
-- 
2.5.0