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Re: [Patch AArch64] Fixup to fcvt patterns added in r237200


On Fri, Jun 10, 2016 at 01:29:39PM +0100, James Greenhalgh wrote:
> 
> Hi,
> 
> My autotester picked up some issues with the vcvt{ds}_n_* intrinsics
> added in r237200.
> 
> The iterators in this pattern do not resolve, as they have not been
> explicitly tied to the mode iterator (rather than the code iterator)
> used by the pattern.
> 
> This fixup adds the attribute tags, allowing the patterns to work
> correctly.
> 
> Additionally, the types assigned to these instructions were wrong, and
> would permit the immediate operand to be in a register. This will then
> develop in to an ICE as the patterns require an immediate operand, and so
> won't match. The ICE can be exposed by writing a wrapping function around
> the vcvtd_n_* intrinsics, which forces the immediate operand to a register.
> We have the infrastructure to error to the user rather than ICEing, but it
> needs some different types, which this patch adds.
> 
> I've checked this with an aarch64-none-elf test run, and run it through
> several rounds of my autotester for aarch64-none-elf and
> aarch64_be-none-elf.
> 
> OK?

*ping*

https://gcc.gnu.org/ml/gcc-patches/2016-06/msg00805.html

Thanks,
James

> ---
> 2016-06-10  James Greenhalgh  <james.greenhalgh@arm.com>
> 
> 	* config/aarch64/aarch64.md
> 	(<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3): Add attributes to
> 	iterators.
> 	(<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3): Likewise.  Correct
> 	attributes.
> 	* config/aarch64/aarch64-builtins.c
> 	(aarch64_types_binop_uss_qualifiers): Delete.
> 	(TYPES_BINOP_USS): Likewise.
> 	(aarch64_types_binop_sus_qualifiers): Likewise.
> 	(TYPES_BINOP_SUS): Likewise.
> 	(aarch64_types_fcvt_from_unsigned_qualifiers): New.
> 	(TYPES_FCVTIMM_SUS): Likewise.
> 	* config/aarch64/aarch64-simd-builtins.def (scvtf): Use SHIFTIMM
> 	rather than BINOP.
> 	(ucvtf): Use FCVTIMM_SUS rather than BINOP_SUS.
> 	(fcvtzs): Use SHIFTIMM rather than BINOP.
> 	(fcvtzu): Use SHIFTIMM_USS rather than BINOP_USS.
> 


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