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Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259)
- From: Jakub Jelinek <jakub at redhat dot com>
- To: Christophe Lyon <christophe dot lyon at linaro dot org>
- Cc: Richard Biener <rguenther at suse dot de>, Ilya Enkovich <enkovich dot gnu at gmail dot com>, gcc-patches <gcc-patches at gcc dot gnu dot org>
- Date: Thu, 9 Jun 2016 14:46:30 +0200
- Subject: Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259)
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- References: <20160607092816 dot GO7387 at tucnak dot redhat dot com> <CAKdteOao+DTx-KMgKcQu3Fzz_MEhqvh-eqzLKWnSHn=Pk5bR8A at mail dot gmail dot com> <alpine dot LSU dot 2 dot 11 dot 1606081226060 dot 1493 at t29 dot fhfr dot qr> <20160608103220 dot GA7387 at tucnak dot redhat dot com> <alpine dot LSU dot 2 dot 11 dot 1606081233220 dot 1493 at t29 dot fhfr dot qr> <CAKdteOba1Z3GPi7x2uPEOs7j1WoVV6MsL+ntC7Ttcob5PrF4Xg at mail dot gmail dot com> <20160608145000 dot GG7387 at tucnak dot redhat dot com> <CAKdteObJgF5_mdK+uOKNNrLgz=ZTKPcFPeckkLsqikzaVP6Bog at mail dot gmail dot com> <20160609123120 dot GO7387 at tucnak dot redhat dot com> <CAKdteOZsP3VAhdNJqTBG18ShL-PKr_+zQZ6meYn_8TT+zw0iDg at mail dot gmail dot com>
- Reply-to: Jakub Jelinek <jakub at redhat dot com>
On Thu, Jun 09, 2016 at 02:40:43PM +0200, Christophe Lyon wrote:
> > Bet it depends if this happens before the signal(SIGILL, sig_ill_handler);
> > call or after it. If before, then I guess you'd better rewrite the
> > long long a = 0, b = 1;
> > asm ("vorr %P0, %P1, %P2"
> > : "=w" (a)
> > : "0" (a), "w" (b));
> > if (a != 1)
>
> Of course you are right: it happens just before the call to signal,
> to build the sig_ill_handler address in r1.
>
> So it's not even a problem with rewriting the asm.
Ugh, so the added options don't affect just vectorized code, but normal
integer only code?
check_vect is fragile, there is always a risk that some instruction is
scheduled before the call.
If you have working target attribute support, I think you should compile
check_vect with attribute set to some lowest common denominator that every
ARM CPU supports (if there is any, that is). Though most likely you'll need
to tweak the inline asm, because maybe "w" constraint won't be available
then.
Jakub