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Re: [v2][AArch64, 6/6] Reimplement vpadd intrinsics & extend rtl patterns to all modes
- From: James Greenhalgh <james dot greenhalgh at arm dot com>
- To: Jiong Wang <jiong dot wang at foss dot arm dot com>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>, <nd at arm dot com>
- Date: Wed, 8 Jun 2016 10:58:40 +0100
- Subject: Re: [v2][AArch64, 6/6] Reimplement vpadd intrinsics & extend rtl patterns to all modes
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On Mon, Jun 06, 2016 at 02:40:55PM +0100, Jiong Wang wrote:
> These intrinsics was implemented by inline assembly using "faddp" instruction.
> There was a pattern "aarch64_addpv4sf" which supportsV4SF mode only while we can
> extend this pattern to support VDQF mode, then we can reimplement these
> intrinsics through builtlins.
OK. But watch your ChangeLog format and line length.
Thanks again for this second spin of this patch set. I'm much happier
knowing that we don't have to revisit some of these intrinsics.
Thanks,
James
>
> gcc/
> 2016-06-06 Jiong Wang<jiong.wang@arm.com>
>
> * config/aarch64/aarch64-builtins.def (faddp): New builtins for modes in VDQF.
> * config/aarch64/aarch64-simd.md (aarch64_faddp<mode>): New.
> (arch64_addpv4sf): Delete.
> (reduc_plus_scal_v4sf): Use "gen_aarch64_faddpv4sf" instead of
> "gen_aarch64_addpv4sf".
> * config/aarch64/arm_neon.h (vpadd_f32): Remove inline assembly. Use
> builtin.
> (vpadds_f32): Likewise.
> (vpaddq_f32): Likewise.
> (vpaddq_f64): Likewise.
>