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[PATCH] vinsertps XMM16-XMM31 fixes
- From: Jakub Jelinek <jakub at redhat dot com>
- To: Uros Bizjak <ubizjak at gmail dot com>, Kirill Yukhin <kirill dot yukhin at gmail dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Mon, 9 May 2016 18:45:55 +0200
- Subject: [PATCH] vinsertps XMM16-XMM31 fixes
- Authentication-results: sourceware.org; auth=none
- Reply-to: Jakub Jelinek <jakub at redhat dot com>
Hi!
vinsertps is already in AVX512F, so we can use use v constraints
freely.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2016-05-09 Jakub Jelinek <jakub@redhat.com>
* config/i386/sse.md (*vec_setv4sf_sse4_1, sse4_1_insertps): Use v
constraint instead of x in avx alternatives. Use maybe_evex instead
of vex prefix.
* gcc.target/i386/avx512vl-vinsertps-1.c: New test.
--- gcc/config/i386/sse.md.jj 2016-05-09 12:34:58.839865460 +0200
+++ gcc/config/i386/sse.md 2016-05-09 13:15:55.400130875 +0200
@@ -6657,11 +6657,11 @@ (define_insn "vec_set<mode>_0"
;; A subset is vec_setv4sf.
(define_insn "*vec_setv4sf_sse4_1"
- [(set (match_operand:V4SF 0 "register_operand" "=Yr,*x,x")
+ [(set (match_operand:V4SF 0 "register_operand" "=Yr,*x,v")
(vec_merge:V4SF
(vec_duplicate:V4SF
- (match_operand:SF 2 "nonimmediate_operand" "Yrm,*xm,xm"))
- (match_operand:V4SF 1 "register_operand" "0,0,x")
+ (match_operand:SF 2 "nonimmediate_operand" "Yrm,*xm,vm"))
+ (match_operand:V4SF 1 "register_operand" "0,0,v")
(match_operand:SI 3 "const_int_operand")))]
"TARGET_SSE4_1
&& ((unsigned) exact_log2 (INTVAL (operands[3]))
@@ -6684,13 +6684,13 @@ (define_insn "*vec_setv4sf_sse4_1"
(set_attr "prefix_data16" "1,1,*")
(set_attr "prefix_extra" "1")
(set_attr "length_immediate" "1")
- (set_attr "prefix" "orig,orig,vex")
+ (set_attr "prefix" "orig,orig,maybe_evex")
(set_attr "mode" "V4SF")])
(define_insn "sse4_1_insertps"
- [(set (match_operand:V4SF 0 "register_operand" "=Yr,*x,x")
- (unspec:V4SF [(match_operand:V4SF 2 "nonimmediate_operand" "Yrm,*xm,xm")
- (match_operand:V4SF 1 "register_operand" "0,0,x")
+ [(set (match_operand:V4SF 0 "register_operand" "=Yr,*x,v")
+ (unspec:V4SF [(match_operand:V4SF 2 "nonimmediate_operand" "Yrm,*xm,vm")
+ (match_operand:V4SF 1 "register_operand" "0,0,v")
(match_operand:SI 3 "const_0_to_255_operand" "n,n,n")]
UNSPEC_INSERTPS))]
"TARGET_SSE4_1"
@@ -6718,7 +6718,7 @@ (define_insn "sse4_1_insertps"
(set_attr "prefix_data16" "1,1,*")
(set_attr "prefix_extra" "1")
(set_attr "length_immediate" "1")
- (set_attr "prefix" "orig,orig,vex")
+ (set_attr "prefix" "orig,orig,maybe_evex")
(set_attr "mode" "V4SF")])
(define_split
--- gcc/testsuite/gcc.target/i386/avx512vl-vinsertps-1.c.jj 2016-05-09 13:10:08.277794535 +0200
+++ gcc/testsuite/gcc.target/i386/avx512vl-vinsertps-1.c 2016-05-09 13:13:51.788792211 +0200
@@ -0,0 +1,39 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mavx512vl" } */
+
+#include <x86intrin.h>
+
+__m128
+f1 (__m128 a, __m128 b)
+{
+ register __m128 c __asm ("xmm16") = a;
+ asm volatile ("" : "+v" (c));
+ c = _mm_insert_ps (c, b, 1);
+ asm volatile ("" : "+v" (c));
+ return c;
+}
+
+/* { dg-final { scan-assembler "vinsertps\[^\n\r\]*xmm16" } } */
+
+__v4sf
+f2 (__v4sf a, float b)
+{
+ register __v4sf c __asm ("xmm17") = a;
+ asm volatile ("" : "+v" (c));
+ c[1] = b;
+ asm volatile ("" : "+v" (c));
+ return c;
+}
+
+/* { dg-final { scan-assembler "vinsertps\[^\n\r\]*xmm17" } } */
+
+__v4sf
+f3 (__v4sf a, float b)
+{
+ register float c __asm ("xmm18") = b;
+ asm volatile ("" : "+v" (c));
+ a[1] = c;
+ return a;
+}
+
+/* { dg-final { scan-assembler "vinsertps\[^\n\r\]*xmm18" } } */
Jakub