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[PATCH][AArch64] Define WORD_REGISTER_OPERATIONS to zero and comment why
- From: Kyrill Tkachov <kyrylo dot tkachov at foss dot arm dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Cc: Marcus Shawcroft <marcus dot shawcroft at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>, James Greenhalgh <james dot greenhalgh at arm dot com>
- Date: Wed, 27 Apr 2016 15:09:06 +0100
- Subject: [PATCH][AArch64] Define WORD_REGISTER_OPERATIONS to zero and comment why
- Authentication-results: sourceware.org; auth=none
Hi all,
WORD_REGISTER_OPERATIONS is currently cryptically commented out in aarch64.h.
In reality, we cannot define it to 1 for aarch64 because operations narrower than word_mode (DImode for aarch64)
don't behave like word_mode if they use the W-form of the registers. They'll be performed in SImode in that case.
This patch adds a comment to that effect.
Longer term, I think it should be possible to teach the midend about this behaviour on aarch64 (maybe re-define
WORD_REGISTER_OPERATIONS to something like NARROWEST_NATURAL_INT_MODE?) to take advantage of these semantics,
but in the meantime this should clear up the current situation.
Bootstrapped and tested on aarch64.
This patch shouldn't have any functional changes.
Does the wording look ok for trunk?
Thanks,
Kyrill
2015-04-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.h (WORD_REGISTER_OPERATIONS): Define to 0
and explain why in a comment.
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index e2ead511076a2192eb79b79ec0a72777f82af35c..61c56b17efc09b65eeaa5441ab916ab7e0c8a969 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -708,7 +708,12 @@ do { \
#define USE_STORE_PRE_INCREMENT(MODE) 0
#define USE_STORE_PRE_DECREMENT(MODE) 0
-/* ?? #define WORD_REGISTER_OPERATIONS */
+/* WORD_REGISTER_OPERATIONS does not hold for AArch64.
+ The assigned word_mode is DImode but operations narrower than SImode
+ behave as 32-bit operations if using the W-form of the registers rather
+ than as word_mode (64-bit) operations as WORD_REGISTER_OPERATIONS
+ expects. */
+#define WORD_REGISTER_OPERATIONS 0
/* Define if loading from memory in MODE, an integral mode narrower than
BITS_PER_WORD will either zero-extend or sign-extend. The value of this