Re: [PATCH] Simplify ix86_expand_vector_move_misalign

["H.J. Lu" <hjl dot tools at gmail dot com>]

On Wed, Apr 20, 2016 at 4:19 AM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Wed, Apr 20, 2016 at 1:09 PM, Uros Bizjak <ubizjak@gmail.com> wrote:
>> On Tue, Apr 19, 2016 at 4:48 PM, H.J. Lu <hongjiu.lu@intel.com> wrote:
>>> Since mov<mode>_internal patterns handle both aligned/unaligned load
>>> and store, we can simplify ix86_avx256_split_vector_move_misalign and
>>> ix86_expand_vector_move_misalign.
>>>
>>> Tested on x86-64.  OK for trunk?
>>>
>>> H.J.
>>> ---
>>>         * config/i386/i386.c (ix86_avx256_split_vector_move_misalign):
>>>         Short-cut unaligned load and store cases.  Handle all integer
>>>         vector modes.
>>>         (ix86_expand_vector_move_misalign): Short-cut unaligned load
>>>         and store cases.  Call ix86_avx256_split_vector_move_misalign
>>>         directly without checking mode class.
>>
>> LGTM, but it is hard to review interwoven code movements and deletions...
>>
>> Hopefully OK.
>
> BTW: There are a couple of regressions in the testsuite [1] when
> configured --with-arch=corei7. Can you please look at the testcases,
> if scan patterns need to be adjusted?
>
> FAIL: gcc.target/i386/avx256-unaligned-load-1.c scan-assembler-not
> (avx_loadups256|vmovups[^\\n\\r]*movv8sf_internal)
> FAIL: gcc.target/i386/avx256-unaligned-store-2.c scan-assembler
> vmovups.*movv16qi_internal/3
>
> [1] https://gcc.gnu.org/ml/gcc-testresults/2016-04/msg01932.html

I will submit a patch.


-- 
H.J.