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Re: [PATCH, i386, AVX-512] Fix PR target/70406.


On Fri, Mar 25, 2016 at 5:11 PM, Kirill Yukhin <kirill.yukhin@gmail.com> wrote:
> Hello,
> Patch in the bottom fixes ICE caused by incosistence of modes
> in andn splitter.
>
> Bootstrapped & regtested (32/64b x86 targets).
> Richard, is it ok for main trunk?
>
> gcc/
>          PR target/70406
>          * config/i386/i386.md (define_split, andn): Fix modes.
>
> gcc/testsuite/
>          PR target/70406
>          * gcc.target/i386/pr70406.c: New test.

OK, it is a trivial patch.

Thanks,
Uros.

> --
> Thanks, K
>
> commit 465529c1aad5a92a7c0b345bf0ab809590dba896
> Author: Kirill Yukhin <kirill.yukhin@intel.com>
> Date:   Fri Mar 25 14:44:18 2016 +0300
>
>     AVX-512. Align type of not epxression in the split.
>
> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
> index 339a134..f324ea7 100644
> --- a/gcc/config/i386/i386.md
> +++ b/gcc/config/i386/i386.md
> @@ -8315,10 +8315,10 @@
>     (clobber (reg:CC FLAGS_REG))]
>    "TARGET_AVX512F && !TARGET_BMI && reload_completed"
>    [(set (match_dup 0)
> -       (not:HI (match_dup 0)))
> +       (not:SWI12 (match_dup 0)))
>     (parallel [(set (match_dup 0)
> -                  (and:HI (match_dup 0)
> -                          (match_dup 1)))
> +                  (and:SWI12 (match_dup 0)
> +                             (match_dup 1)))
>               (clobber (reg:CC FLAGS_REG))])])
>
>  ;; Turn *anddi_1 into *andsi_1_zext if possible.
> diff --git a/gcc/testsuite/gcc.target/i386/pr70406.c b/gcc/testsuite/gcc.target/i386/pr70406.c
> new file mode 100755
> index 0000000..b75a5af
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr70406.c
> @@ -0,0 +1,13 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target ia32 } */
> +/* { dg-options "-O -mtune=pentium2 -mavx512f" } */
> +
> +typedef int v4si __attribute__ ((vector_size (16)));
> +
> +unsigned
> +foo (unsigned char i, unsigned x, v4si u, v4si v, v4si w)
> +{
> +  i &= (unsigned)~x;
> +  v <<= w[x];
> +  return i + u[x] + v[i];
> +}


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