[PATCH AArch64]Force register scaling out of mem ref and comment why

[Bin Cheng <Bin dot Cheng at arm dot com>]

Hi,
There is a performance regression caused by my previous change to aarch64_legitimize_address, in which I forced constant offset out of memory ref if the address expr is in the form of "reg1 + reg2 << scale + const".  The intention is to reveal as many loop-invariant opportunities as possible, while depend on GIMPLE optimizers picking up CSE opportunities of "reg << scale" among different memory references.

Though the assumption still holds, gimple optimizers are not powerful enough to pick up CSE opportunities of register scaling expressions at current time.  Here comes a workaround: this patch forces register scaling expression out of memory ref, so that RTL CSE pass can handle common register scaling expressions issue, of course, at a cost of possibly missed loop invariants.

James and I collected perf data, fortunately this change can improve performance for several cases in various benchmarks, while doesn't cause big regression.  It also recovers big regression we observed before for the previous change.

I also added comment explaining why the workaround is necessary.  I also files PR69653 as an example showing tree optimizer should be improved.

Bootstrap and test on AArch64, is it OK?

Thanks,
bin


2016-02-04  Bin Cheng  <bin.cheng@arm.com>

	* config/aarch64/aarch64.c (aarch64_legitimize_address): Force
	register scaling out of memory reference and comment why.

Attachment: force-reg_scaling-out-of-mem_ref-20160201.txt
Description: force-reg_scaling-out-of-mem_ref-20160201.txt