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Re: [patch] Fix PR middle-end/68291 & 68292


> Yes you are right. the PASS->FAIL and "PASS disappears" are consequences
> of the new failures above.

OK.  The issue is that we used to create a REG:BLK for RESULT_DECL, but now we 
get to hard_function_value as originally, which rightfully adjusts it to SI:

  val
   = targetm.calls.function_value (valtype, func ? func : fntype, outgoing);

  if (REG_P (val)
      && GET_MODE (val) == BLKmode)
    {
      unsigned HOST_WIDE_INT bytes = int_size_in_bytes (valtype);
      machine_mode tmpmode;

      /* int_size_in_bytes can return -1.  We don't need a check here
	 since the value of bytes will then be large enough that no
	 mode will match anyway.  */

      for (tmpmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
	   tmpmode != VOIDmode;
	   tmpmode = GET_MODE_WIDER_MODE (tmpmode))
	{
	  /* Have we found a large enough mode?  */
	  if (GET_MODE_SIZE (tmpmode) >= bytes)
	    break;
	}

      /* No suitable mode found.  */
      gcc_assert (tmpmode != VOIDmode);

      PUT_MODE (val, tmpmode);
    }

and we assert in the second gcc_checking_assert of set_rtl because mode and 
promote_ssa_mode don't agree anymore (SI vs BLK).  So we need to relax the 
second gcc_checking_assert the same way as the first one.

I'm going to test it on x86-64, SPARC64 and Aarch64.


	PR middle-end/68291
	PR middle-end/68292
	* cfgexpand.c (set_rtl): Always accept mode mismatch for SSA names
	with BLKmode promoted mode based on RESULT_DECLs.


-- 
Eric Botcazou
Index: cfgexpand.c
===================================================================
--- cfgexpand.c	(revision 231394)
+++ cfgexpand.c	(working copy)
@@ -203,11 +203,14 @@ set_rtl (tree t, rtx x)
      PARM_DECLs and RESULT_DECLs, we'll have been called by
      set_parm_rtl, which will give us the default def, so we don't
      have to compute it ourselves.  For RESULT_DECLs, we accept mode
-     mismatches too, as long as we're not coalescing across variables,
-     so that we don't reject BLKmode PARALLELs or unpromoted REGs.  */
+     mismatches too, as long as we have BLKmode or are not coalescing
+     across variables, so that we don't reject BLKmode PARALLELs or
+     unpromoted REGs.  */
   gcc_checking_assert (!x || x == pc_rtx || TREE_CODE (t) != SSA_NAME
-		       || (SSAVAR (t) && TREE_CODE (SSAVAR (t)) == RESULT_DECL
-			   && !flag_tree_coalesce_vars)
+		       || (SSAVAR (t)
+			   && TREE_CODE (SSAVAR (t)) == RESULT_DECL
+			   && (promote_ssa_mode (t, NULL) == BLKmode
+			       || !flag_tree_coalesce_vars))
 		       || !use_register_for_decl (t)
 		       || GET_MODE (x) == promote_ssa_mode (t, NULL));
 

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