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[PATCH 3/7][ARM] Add patterns for new instructions
- From: Matthew Wahab <matthew dot wahab at foss dot arm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Thu, 26 Nov 2015 16:00:25 +0000
- Subject: [PATCH 3/7][ARM] Add patterns for new instructions
- Authentication-results: sourceware.org; auth=none
- References: <56572B79 dot 9000406 at foss dot arm dot com>
Hello,
This patch adds patterns for the instructions, vqrdmlah and vqrdmlsh,
introduced in the ARMv8.1 architecture. The instructions are made
available when -march=armv8.1-a is enabled with suitable fpu settings,
such as -mfpu=neon-fp-armv8 -mfloat-abi=hard.
Tested the series for arm-none-eabi with cross-compiled check-gcc on an
ARMv8.1 emulator. Also tested arm-none-linux-gnueabihf with native
bootstrap and make check.
Ok for trunk?
Matthew
gcc/
2015-11-26 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/iterators.md (VQRDMLH_AS): New.
(neon_rdma_as): New.
* config/arm/neon.md
(neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h<mode>): New.
(neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h_lane<mode>): New.
* config/arm/unspecs.md (UNSPEC_VQRDMLAH): New.
(UNSPEC_VQRDMLSH): New.
>From fea646491d51548b775fdfb5a4fd6d6bc72d4c83 Mon Sep 17 00:00:00 2001
From: Matthew Wahab <matthew.wahab@arm.com>
Date: Wed, 17 Jun 2015 12:00:50 +0100
Subject: [PATCH 3/7] [ARM] Add patterns for new instructions.
Change-Id: Ia84c345019c7beda2d3c6c39074043d2e005347a
---
gcc/config/arm/iterators.md | 5 +++++
gcc/config/arm/neon.md | 45 +++++++++++++++++++++++++++++++++++++++++++++
gcc/config/arm/unspecs.md | 2 ++
3 files changed, 52 insertions(+)
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
index 6a54125..c7a6880 100644
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -362,6 +362,8 @@
(define_int_iterator CRYPTO_SELECTING [UNSPEC_SHA1C UNSPEC_SHA1M
UNSPEC_SHA1P])
+(define_int_iterator VQRDMLH_AS [UNSPEC_VQRDMLAH UNSPEC_VQRDMLSH])
+
;;----------------------------------------------------------------------------
;; Mode attributes
;;----------------------------------------------------------------------------
@@ -831,3 +833,6 @@
(simple_return " && use_simple_return_p ()")])
(define_code_attr return_cond_true [(return " && USE_RETURN_INSN (TRUE)")
(simple_return " && use_simple_return_p ()")])
+
+;; Attributes for VQRDMLAH/VQRDMLSH
+(define_int_attr neon_rdma_as [(UNSPEC_VQRDMLAH "a") (UNSPEC_VQRDMLSH "s")])
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index 62fb6da..844ef5e 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -2014,6 +2014,18 @@
[(set_attr "type" "neon_sat_mul_<V_elem_ch><q>")]
)
+;; vqrdmlah, vqrdmlsh
+(define_insn "neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h<mode>"
+ [(set (match_operand:VMDQI 0 "s_register_operand" "=w")
+ (unspec:VMDQI [(match_operand:VMDQI 1 "s_register_operand" "0")
+ (match_operand:VMDQI 2 "s_register_operand" "w")
+ (match_operand:VMDQI 3 "s_register_operand" "w")]
+ VQRDMLH_AS))]
+ "TARGET_NEON_RDMA"
+ "vqrdml<VQRDMLH_AS:neon_rdma_as>h.<V_s_elem>\t%<V_reg>0, %<V_reg>2, %<V_reg>3"
+ [(set_attr "type" "neon_sat_mla_<V_elem_ch>_long")]
+)
+
(define_insn "neon_vqdmlal<mode>"
[(set (match_operand:<V_widen> 0 "s_register_operand" "=w")
(unspec:<V_widen> [(match_operand:<V_widen> 1 "s_register_operand" "0")
@@ -3176,6 +3188,39 @@ if (BYTES_BIG_ENDIAN)
[(set_attr "type" "neon_sat_mul_<V_elem_ch>_scalar_q")]
)
+;; vqrdmlah_lane, vqrdmlsh_lane
+(define_insn "neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h_lane<mode>"
+ [(set (match_operand:VMQI 0 "s_register_operand" "=w")
+ (unspec:VMQI [(match_operand:VMQI 1 "s_register_operand" "0")
+ (match_operand:VMQI 2 "s_register_operand" "w")
+ (match_operand:<V_HALF> 3 "s_register_operand"
+ "<scalar_mul_constraint>")
+ (match_operand:SI 4 "immediate_operand" "i")]
+ VQRDMLH_AS))]
+ "TARGET_NEON_RDMA"
+{
+ return
+ "vqrdml<VQRDMLH_AS:neon_rdma_as>h.<V_s_elem>\t%q0, %q2, %P3[%c4]";
+}
+ [(set_attr "type" "neon_mla_<V_elem_ch>_scalar<q>")]
+)
+
+(define_insn "neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h_lane<mode>"
+ [(set (match_operand:VMDI 0 "s_register_operand" "=w")
+ (unspec:VMDI [(match_operand:VMDI 1 "s_register_operand" "0")
+ (match_operand:VMDI 2 "s_register_operand" "w")
+ (match_operand:VMDI 3 "s_register_operand"
+ "<scalar_mul_constraint>")
+ (match_operand:SI 4 "immediate_operand" "i")]
+ VQRDMLH_AS))]
+ "TARGET_NEON_RDMA"
+{
+ return
+ "vqrdml<VQRDMLH_AS:neon_rdma_as>h.<V_s_elem>\t%P0, %P2, %P3[%c4]";
+}
+ [(set_attr "type" "neon_mla_<V_elem_ch>_scalar")]
+)
+
(define_insn "neon_vmla_lane<mode>"
[(set (match_operand:VMD 0 "s_register_operand" "=w")
(unspec:VMD [(match_operand:VMD 1 "s_register_operand" "0")
diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md
index 44d4e7d..e7ae9a2 100644
--- a/gcc/config/arm/unspecs.md
+++ b/gcc/config/arm/unspecs.md
@@ -360,5 +360,7 @@
UNSPEC_NVRINTX
UNSPEC_NVRINTA
UNSPEC_NVRINTN
+ UNSPEC_VQRDMLAH
+ UNSPEC_VQRDMLSH
])
--
2.1.4