This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [PATCH], PowerPC IEEE 128-bit patch #8 (libgcc bits, revised)
- From: Joseph Myers <joseph at codesourcery dot com>
- To: Michael Meissner <meissner at linux dot vnet dot ibm dot com>
- Cc: <gcc-patches at gcc dot gnu dot org>, <dje dot gcc at gmail dot com>, Steve Munroe <sjmunroe at us dot ibm dot com>, Tulio Magno Quites Machado Filho <tulioqm at br dot ibm dot com>
- Date: Mon, 16 Nov 2015 23:06:45 +0000
- Subject: Re: [PATCH], PowerPC IEEE 128-bit patch #8 (libgcc bits, revised)
- Authentication-results: sourceware.org; auth=none
- References: <20150729200428 dot GA30347 at ibm-tiger dot the-meissners dot org> <20150814154859 dot GC20847 at ibm-tiger dot the-meissners dot org> <20151023172210 dot GA18348 at ibm-tiger dot the-meissners dot org> <20151027222704 dot GA16546 at ibm-tiger dot the-meissners dot org> <alpine dot DEB dot 2 dot 10 dot 1510272241500 dot 21730 at digraph dot polyomino dot org dot uk> <20151103221659 dot GA19985 at ibm-tiger dot the-meissners dot org> <20151103225346 dot GA26767 at ibm-tiger dot the-meissners dot org> <20151114000223 dot GA14976 at ibm-tiger dot the-meissners dot org>
On Fri, 13 Nov 2015, Michael Meissner wrote:
> This patch should address the following IEEE problems with the libgcc emulator
> with exceptions, etc. Steve is working on patches to libdfp for Decimal
> conversions.
Are the libgcc2.c functions for KFmode and the corresponding complex mode
KCmode (__divkc3 __mulkc3 __powikf2) also planned for GCC 6?
> * config/rs6000/sfp-machine.h (_FP_W_TYPE_SIZE): Update
> defintiions to use 64-bit types for 64-bit systems or 32-bit VSX
> systems with IEEE 128-bit floating point support.
> (_FP_W_TYPE): Likewise.
> (_FP_WS_TYPE): Likewise.
> (_FP_I_TYPE): Likewise.
> (TItype): Add defintions for IEEE 128-bit floating point support.
> (UTItype): Likewise.
> (TI_BITS): Likewise.
> (_FP_MUL_MEAT_Q): Use 64-bit types on 64-bit systems and for
> 32-bit VSX systems with IEEE 128-bit floating point.
> (_FP_DIV_MEAT_Q): Likewise.
> (_FP_NANFRAC_Q): Likewise.
This ChangeLog entry doesn't seem to have been updated for the exceptions
/ rounding modes support.
> +#define ISA_BIT(x) (1 << (63 - x))
I think all the new sfp-machine.h code for integration with hardware
exceptions and rounding modes needs to be conditional on hard-float +
FPRs, so it doesn't affect building for SFmode / DFmode for soft-float /
e500.
> + /* First do the unordered comparison. */
> + FP_CMP_UNORD_Q (r, A, B, 1);
> + if (r)
> + r2 = PPC_UNORDERED;
> +
> + else
> + {
> + /* If the value is not unordered, do the normal comparison. */
> + FP_CMP_Q (r, A, B, 2, 2);
> + if (r == CMP_INVALID)
> + FP_SET_EXCEPTION (FP_EX_INVALID);
> +
> + r2 = ((r < CMP_LOW || r > CMP_HIGH)
> + ? PPC_UNORDERED
> + : ppc_cr_map[r-CMP_LOW]);
This may be correct, but it's overly complicated. All the handling in the
"else" case for exceptions / unordered is dead code, since in that case
you know that the values aren't unordered. And you can more simply do
FP_CMP_Q (r, A, B, 2, 1);
at which point "invalid" has been raised if appropriate (for signaling
NaNs but not for other arguments), and r contains one of the values -1, 0,
1, 2, which you can map directly to the appropriate return value.
--
Joseph S. Myers
joseph@codesourcery.com